index
:
llvm
master
release_1
release_16
release_20
release_21
release_22
release_23
release_24
release_25
release_26
release_27
release_28
release_29
release_30
release_31
release_32
release_33
stable
svn-tags/RELEASE_1
svn-tags/RELEASE_20
svn-tags/RELEASE_21
svn-tags/RELEASE_22
svn-tags/RELEASE_23
svn-tags/RELEASE_24
svn-tags/RELEASE_25
svn-tags/RELEASE_26
svn-tags/RELEASE_27
svn-tags/RELEASE_28
svn-tags/RELEASE_29
svn-tags/RELEASE_30
svn-tags/RELEASE_31
svn-tags/RELEASE_32
testing
http://llvm.org
git repository hosting
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
lib
/
CodeGen
/
PostRASchedulerList.cpp
Age
Commit message (
Expand
)
Author
2013-02-05
Remove special-casing of return blocks for liveness.
Jakob Stoklund Olesen
2012-12-20
Use MachineInstrBuilder in a few CodeGen passes.
Jakob Stoklund Olesen
2012-12-03
Use the new script to sort the includes of every file under lib.
Chandler Carruth
2012-11-13
misched: Don't consider artificial edges weak edges.
Andrew Trick
2012-11-12
misched: Infrastructure for weak DAG edges.
Andrew Trick
2012-10-15
Switch most getReservedRegs() clients to the MRI equivalent.
Jakob Stoklund Olesen
2012-09-11
Release build: guard dump functions with
Manman Ren
2012-09-06
Release build: guard dump functions with "ifndef NDEBUG"
Manman Ren
2012-08-22
Add a getName function to MachineFunction. Use it in places that previously d...
Craig Topper
2012-06-06
Move RegisterClassInfo.h.
Andrew Trick
2012-06-06
Remove unused private fields found by clang's new -Wunused-private-field.
Benjamin Kramer
2012-06-01
Switch all register list clients to the new MC*Iterator interface.
Jakob Stoklund Olesen
2012-04-23
This patch fixes a problem which arose when using the Post-RA scheduler
Preston Gurd
2012-03-09
misched interface: rename Begin/End to RegionBegin/RegionEnd since they are n...
Andrew Trick
2012-03-07
misched prep: Expose the ScheduleDAGInstrs interface so targets may
Andrew Trick
2012-03-07
misched prep: rename InsertPos to End.
Andrew Trick
2012-03-07
misched preparation: rename core scheduler methods for consistency.
Andrew Trick
2012-03-07
misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
Andrew Trick
2012-03-07
misched preparation: modularize schedule emission.
Andrew Trick
2012-03-07
misched preparation: modularize schedule printing.
Andrew Trick
2012-03-07
misched preparation: modularize schedule verification.
Andrew Trick
2012-03-05
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati...
Craig Topper
2012-02-23
BitVectorize loop.
Benjamin Kramer
2012-02-23
post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored t...
Benjamin Kramer
2012-02-23
post-ra-sched: Replace a std::set of regs with a bitvector.
Benjamin Kramer
2012-02-23
Make calls scheduling boundaries post-ra.
Jakob Stoklund Olesen
2012-02-23
Handle regmasks in FixupKills.
Jakob Stoklund Olesen
2012-02-22
Make all pointers to TargetRegisterClass const since they are all pointers to...
Craig Topper
2012-02-08
Codegen pass definition cleanup. No functionality.
Andrew Trick
2012-02-08
Move pass configuration out of pass constructors: PostRAScheduler.
Andrew Trick
2012-01-14
misched: Added ScheduleDAGInstrs::IsPostRA
Andrew Trick
2011-12-14
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
Evan Cheng
2011-12-07
Add bundle aware API for querying instruction properties and switch the code
Evan Cheng
2011-11-15
Remove all remaining uses of Value::getNameStr().
Benjamin Kramer
2011-07-01
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
Evan Cheng
2011-06-16
Teach antidependency breakers to use RegisterClassInfo.
Jakob Stoklund Olesen
2011-06-02
Update DBG_VALUEs while breaking anti dependencies.
Devang Patel
2011-06-01
Add an issue width check to the postRA scheduler. Patch by Max Kazakov!
Andrew Trick
2011-05-06
Typo: Reviewed by Alistair.
Andrew Trick
2011-05-06
Post-RA scheduler compile time fix. Quadratic computation of DAG node depth.
Andrew Trick
2010-12-24
Various bits of framework needed for precise machine-level selection
Andrew Trick
2010-09-10
Teach if-converter to be more careful with predicating instructions that would
Evan Cheng
2010-08-06
Reapply r110396, with fixes to appease the Linux buildbot gods.
Owen Anderson
2010-08-06
Revert r110396 to fix buildbots.
Owen Anderson
2010-08-05
Don't use PassInfo* as a type identifier for passes. Instead, use the addres...
Owen Anderson
2010-07-15
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
Bill Wendling
2010-06-18
Allow ARM if-converter to be run after post allocation scheduling.
Evan Cheng
2010-06-14
- Do away with SimpleHazardRecognizer.h. It's not used and offers little value.
Evan Cheng
2010-06-12
Allow target to provide its own hazard recognizer to post-ra scheduler.
Evan Cheng
2010-05-21
- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
Evan Cheng
[next]