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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113398 91177308-0d34-0410-b5e6-96231b3b80d8
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pointer was intended. rdar://8401980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113394 91177308-0d34-0410-b5e6-96231b3b80d8
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Omission of memory form of PI2PD is intentional; this
does not use an MMX register and does not put the chip
into MMX mode (PI2PS, oddly enough, does).
Operands of PI2PS follow the gcc builtin, not Intel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113387 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113386 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113385 91177308-0d34-0410-b5e6-96231b3b80d8
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2-phase build of llvm and llvm-gcc, similar to what the buildbots do, and runs
the regression testsuite.
Things to do:
- Work out some bugs with llvm-gcc flags.
- Not all platforms support ObjC.
- Run the test-suite.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113381 91177308-0d34-0410-b5e6-96231b3b80d8
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so that it can access them. These are not intended to be externally accessible APIs.
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modules are instantiated in them. If the context is deleted, all of its owned
modules are also deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113374 91177308-0d34-0410-b5e6-96231b3b80d8
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nodes to emit shuffles and don't do isel mask matching anymore.
- Add the selection of the remaining shuffle opcode (movddup)
- Introduce two new functions to "recognize" where we may get
potential folds and add several comments to them explaining why
they are not yet in the desidered shape.
- Add more patterns to fallback the case where we select
a specific shuffle opcode as if it could fold a load, but it
can't, so remap to a valid instruction.
- Add a couple of FIXMEs to address in the following days once
there's a good solution to the current folding problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113369 91177308-0d34-0410-b5e6-96231b3b80d8
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option to disable base pointer usage, pay attention to it when deciding
if we can realign (if no base pointer and VLAs, we can't).
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Follow the same logic in the LoopPass, ModulePass and CallGraphSCCPass printers,
as it was already used in the BasicBlockPass and FunctionPass printers. This is
more consistent.
The other option would have been to completely disable dumping the analysis
information. However, as this information is the only information printed if the
-analysis flag is set, calling opt would not do anything at all.
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Some cases of lowering to rotate were miscompiled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113352 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113350 91177308-0d34-0410-b5e6-96231b3b80d8
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fixing rdar://8403974
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implementing rdar://8033482 and PR7254.
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implementation's job to check for and lex the EndOfStatement
marker.
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Add this to the mc assembler, fixing PR8061
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Cygwin-1.5, following up to r113255.
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rdar://8061602
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related. (attempt deux, complete w/ test update this time)
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AliasAnalysis, and some code for implementing the new query on top of
existing implementations by making standard alias and getModRefInfo
queries.
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present in the function and thus whether aligned load/store instructions can
be used.
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optimized for size.
The threshold value of 50 is arbitrary, and I chose it simply by analogy to the inlining thresholds, where
the baseline unrolling threshold is slightly smaller than the baseline inlining threshold. This could
undoubtedly use some tuning.
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LiveIntervals already adds <imp-def> operands for super-registers when a subreg
def defines the whole register. Thus, it is not necessary to do it again when
rewriting.
In fact, the super-register imp-defs caused miscompilations because the late
scheduler couldn't see that the super-register was read.
We still add super-reg <imp-use,kill> operands when rewriting virtuals to
physicals.
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register must be one of the destination registers for the load. Otherwise,
the tLDM instruction will write-back to the base register, which isn't what's
desired (otherwise, we'd have a t2LDM_UPD instead).
rdar://8394087
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direction the shuffle lowering is heading to
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platforms.
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the provided cleanup function is never actually called.
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switch to using a ManagedStatic for the global PassRegistry instead of a
ManagedCleanup, and fix a destruction ordering bug this exposed.
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