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-rw-r--r--test/CodeGen/X86/avx-load-store.ll39
1 files changed, 37 insertions, 2 deletions
diff --git a/test/CodeGen/X86/avx-load-store.ll b/test/CodeGen/X86/avx-load-store.ll
index 77a7c4f945..a6775aba09 100644
--- a/test/CodeGen/X86/avx-load-store.ll
+++ b/test/CodeGen/X86/avx-load-store.ll
@@ -55,7 +55,7 @@ define void @storev16i16(<16 x i16> %a) nounwind {
; CHECK: storev16i16_01
; CHECK: vextractf128
-; CHECK: vmovaps %xmm
+; CHECK: vmovups %xmm
define void @storev16i16_01(<16 x i16> %a) nounwind {
store <16 x i16> %a, <16 x i16>* undef, align 4
unreachable
@@ -81,7 +81,7 @@ define void @storev32i8_01(<32 x i8> %a) nounwind {
; CHECK: _double_save
; CHECK-NOT: vinsertf128 $1
; CHECK-NOT: vinsertf128 $0
-; CHECK: vmovups %xmm
+; CHECK: vmovaps %xmm
; CHECK: vmovaps %xmm
define void @double_save(<4 x i32> %A, <4 x i32> %B, <8 x i32>* %P) nounwind ssp {
entry:
@@ -114,3 +114,38 @@ cif_mixed_test_any_check: ; preds = %cif_mask_mixed
unreachable
}
+; CHECK: add8i32
+; CHECK: vmovups
+; CHECK: vmovups
+; CHECK-NOT: vinsertf128
+; CHECK-NOT: vextractf128
+; CHECK: vmovups
+; CHECK: vmovups
+define void @add8i32(<8 x i32>* %ret, <8 x i32>* %bp) nounwind {
+ %b = load <8 x i32>* %bp, align 1
+ %x = add <8 x i32> zeroinitializer, %b
+ store <8 x i32> %x, <8 x i32>* %ret, align 1
+ ret void
+}
+
+; CHECK: add4i64a64
+; CHECK: vmovaps ({{.*}}), %ymm{{.*}}
+; CHECK: vmovaps %ymm{{.*}}, ({{.*}})
+define void @add4i64a64(<4 x i64>* %ret, <4 x i64>* %bp) nounwind {
+ %b = load <4 x i64>* %bp, align 64
+ %x = add <4 x i64> zeroinitializer, %b
+ store <4 x i64> %x, <4 x i64>* %ret, align 64
+ ret void
+}
+
+; CHECK: add4i64a16
+; CHECK: vmovaps {{.*}}({{.*}}), %xmm{{.*}}
+; CHECK: vmovaps {{.*}}({{.*}}), %xmm{{.*}}
+; CHECK: vmovaps %xmm{{.*}}, {{.*}}({{.*}})
+; CHECK: vmovaps %xmm{{.*}}, {{.*}}({{.*}})
+define void @add4i64a16(<4 x i64>* %ret, <4 x i64>* %bp) nounwind {
+ %b = load <4 x i64>* %bp, align 16
+ %x = add <4 x i64> zeroinitializer, %b
+ store <4 x i64> %x, <4 x i64>* %ret, align 16
+ ret void
+}