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path: root/lib/Target/PowerPC/PPC64ISelPattern.cpp
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Diffstat (limited to 'lib/Target/PowerPC/PPC64ISelPattern.cpp')
-rw-r--r--lib/Target/PowerPC/PPC64ISelPattern.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPC64ISelPattern.cpp b/lib/Target/PowerPC/PPC64ISelPattern.cpp
index 1fca339170..98e69e9cc4 100644
--- a/lib/Target/PowerPC/PPC64ISelPattern.cpp
+++ b/lib/Target/PowerPC/PPC64ISelPattern.cpp
@@ -1030,7 +1030,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
case ISD::ZEXTLOAD:
case ISD::SEXTLOAD: {
MVT::ValueType TypeBeingLoaded = (ISD::LOAD == opcode) ?
- Node->getValueType(0) : cast<MVTSDNode>(Node)->getExtraValueType();
+ Node->getValueType(0) : cast<VTSDNode>(Node->getOperand(3))->getVT();
bool sext = (ISD::SEXTLOAD == opcode);
// Make sure we generate both values.
@@ -1166,7 +1166,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
case ISD::SIGN_EXTEND:
case ISD::SIGN_EXTEND_INREG:
Tmp1 = SelectExpr(N.getOperand(0));
- switch(cast<MVTSDNode>(Node)->getExtraValueType()) {
+ switch(cast<VTSDNode>(Node->getOperand(1))->getVT()) {
default: Node->dump(); assert(0 && "Unhandled SIGN_EXTEND type"); break;
case MVT::i32:
BuildMI(BB, PPC::EXTSW, 1, Result).addReg(Tmp1);