diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-07-10 01:56:13 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-07-10 01:56:13 +0000 |
| commit | bce81ae51ececbd03ffdb17d56c4a1206edfc52e (patch) | |
| tree | 91daf70a444cd0ce68f7af2b856cd27f412e101f /lib/Target/PowerPC/PPC64ISelPattern.cpp | |
| parent | 5f056bf4b862a7c31388a68711dd3b3ed5de2be8 (diff) | |
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22368 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPC64ISelPattern.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPC64ISelPattern.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPC64ISelPattern.cpp b/lib/Target/PowerPC/PPC64ISelPattern.cpp index 1fca339170..98e69e9cc4 100644 --- a/lib/Target/PowerPC/PPC64ISelPattern.cpp +++ b/lib/Target/PowerPC/PPC64ISelPattern.cpp @@ -1030,7 +1030,7 @@ unsigned ISel::SelectExpr(SDOperand N) { case ISD::ZEXTLOAD: case ISD::SEXTLOAD: { MVT::ValueType TypeBeingLoaded = (ISD::LOAD == opcode) ? - Node->getValueType(0) : cast<MVTSDNode>(Node)->getExtraValueType(); + Node->getValueType(0) : cast<VTSDNode>(Node->getOperand(3))->getVT(); bool sext = (ISD::SEXTLOAD == opcode); // Make sure we generate both values. @@ -1166,7 +1166,7 @@ unsigned ISel::SelectExpr(SDOperand N) { case ISD::SIGN_EXTEND: case ISD::SIGN_EXTEND_INREG: Tmp1 = SelectExpr(N.getOperand(0)); - switch(cast<MVTSDNode>(Node)->getExtraValueType()) { + switch(cast<VTSDNode>(Node->getOperand(1))->getVT()) { default: Node->dump(); assert(0 && "Unhandled SIGN_EXTEND type"); break; case MVT::i32: BuildMI(BB, PPC::EXTSW, 1, Result).addReg(Tmp1); |