aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/RegAllocGreedy.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'lib/CodeGen/RegAllocGreedy.cpp')
-rw-r--r--lib/CodeGen/RegAllocGreedy.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index 8dbb56809b..12a1cfcc90 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -329,7 +329,7 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
.splitAroundLoop(Loop->getLoop());
if (VerifyEnabled)
- MF->verify(this);
+ MF->verify(this, "After splitting live range around loop");
// We have new split regs, don't assign anything.
return 0;
@@ -404,7 +404,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
if (VerifyEnabled)
- MF->verify(this);
+ MF->verify(this, "Before greedy register allocator");
RegAllocBase::init(getAnalysis<VirtRegMap>(), getAnalysis<LiveIntervals>());
DomTree = &getAnalysis<MachineDominatorTree>();