diff options
Diffstat (limited to 'include/llvm/CodeGen/SelectionDAGISel.h')
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGISel.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index e9b3f52ed4..c384fa512d 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -21,7 +21,7 @@ namespace llvm { class SelectionDAGLowering; - class SDOperand; + class SDValue; class MachineRegisterInfo; class MachineBasicBlock; class MachineFunction; @@ -70,9 +70,9 @@ public: /// not match or is not implemented, return true. The resultant operands /// (which will appear in the machine instruction) should be added to the /// OutOps vector. - virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op, + virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, - std::vector<SDOperand> &OutOps, + std::vector<SDValue> &OutOps, SelectionDAG &DAG) { return true; } @@ -168,13 +168,13 @@ protected: /// SelectInlineAsmMemoryOperands - Calls to this are automatically generated /// by tblgen. Others should not call it. - void SelectInlineAsmMemoryOperands(std::vector<SDOperand> &Ops, + void SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops, SelectionDAG &DAG); // Calls to these predicates are generated by tblgen. - bool CheckAndMask(SDOperand LHS, ConstantSDNode *RHS, + bool CheckAndMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const; - bool CheckOrMask(SDOperand LHS, ConstantSDNode *RHS, + bool CheckOrMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const; private: |