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-rw-r--r--docs/CodeGenerator.html2
-rw-r--r--include/llvm/CodeGen/DAGISelHeader.h14
-rw-r--r--include/llvm/CodeGen/ScheduleDAG.h14
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h354
-rw-r--r--include/llvm/CodeGen/SelectionDAGISel.h12
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h179
-rw-r--r--include/llvm/Target/TargetLowering.h124
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp1402
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp866
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp246
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp482
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeTypes.cpp118
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeTypes.h424
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp86
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp194
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAG.cpp40
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp8
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp744
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp494
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp2
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp108
-rw-r--r--lib/Target/ARM/ARMAddressingModes.h2
-rw-r--r--lib/Target/ARM/ARMISelDAGToDAG.cpp242
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp320
-rw-r--r--lib/Target/ARM/ARMISelLowering.h40
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td2
-rw-r--r--lib/Target/Alpha/AlphaISelDAGToDAG.cpp100
-rw-r--r--lib/Target/Alpha/AlphaISelLowering.cpp128
-rw-r--r--lib/Target/Alpha/AlphaISelLowering.h12
-rw-r--r--lib/Target/Alpha/AlphaInstrInfo.td2
-rw-r--r--lib/Target/CellSPU/SPUISelDAGToDAG.cpp90
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.cpp576
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.h26
-rw-r--r--lib/Target/CellSPU/SPUOperands.td4
-rw-r--r--lib/Target/IA64/IA64ISelDAGToDAG.cpp198
-rw-r--r--lib/Target/IA64/IA64ISelLowering.cpp64
-rw-r--r--lib/Target/IA64/IA64ISelLowering.h12
-rw-r--r--lib/Target/Mips/MipsISelDAGToDAG.cpp76
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp152
-rw-r--r--lib/Target/Mips/MipsISelLowering.h26
-rw-r--r--lib/Target/PIC16/PIC16ISelDAGToDAG.cpp28
-rw-r--r--lib/Target/PIC16/PIC16ISelLowering.cpp134
-rw-r--r--lib/Target/PIC16/PIC16ISelLowering.h22
-rw-r--r--lib/Target/PowerPC/PPCHazardRecognizers.cpp2
-rw-r--r--lib/Target/PowerPC/PPCHazardRecognizers.h4
-rw-r--r--lib/Target/PowerPC/PPCISelDAGToDAG.cpp216
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp746
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.h104
-rw-r--r--lib/Target/Sparc/SparcISelDAGToDAG.cpp34
-rw-r--r--lib/Target/Sparc/SparcISelLowering.cpp168
-rw-r--r--lib/Target/Sparc/SparcISelLowering.h6
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp258
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp1130
-rw-r--r--lib/Target/X86/X86ISelLowering.h146
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp14
-rw-r--r--lib/Transforms/Scalar/CodeGenPrepare.cpp2
-rw-r--r--utils/TableGen/DAGISelEmitter.cpp152
57 files changed, 5573 insertions, 5578 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index 06c6e9ae04..afb6a433c2 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -787,7 +787,7 @@ define multiple values. For example, a combined div/rem operation will define
both the dividend and the remainder. Many other situations require multiple
values as well. Each node also has some number of operands, which are edges
to the node defining the used value. Because nodes may define multiple values,
-edges are represented by instances of the <tt>SDOperand</tt> class, which is
+edges are represented by instances of the <tt>SDValue</tt> class, which is
a <tt>&lt;SDNode, unsigned&gt;</tt> pair, indicating the node and result
value being used, respectively. Each value produced by an <tt>SDNode</tt> has
an associated <tt>MVT</tt> (Machine Value Type) indicating what the type of the
diff --git a/include/llvm/CodeGen/DAGISelHeader.h b/include/llvm/CodeGen/DAGISelHeader.h
index 79f6276282..48050edc06 100644
--- a/include/llvm/CodeGen/DAGISelHeader.h
+++ b/include/llvm/CodeGen/DAGISelHeader.h
@@ -35,7 +35,7 @@ static bool IsChainCompatible(SDNode *Chain, SDNode *Op) {
else if (Chain->getOpcode() == ISD::TokenFactor)
return false;
else if (Chain->getNumOperands() > 0) {
- SDOperand C0 = Chain->getOperand(0);
+ SDValue C0 = Chain->getOperand(0);
if (C0.getValueType() == MVT::Other)
return C0.Val != Op && IsChainCompatible(C0.Val, Op);
}
@@ -75,7 +75,7 @@ inline bool isSelected(int Id) {
/// AddToISelQueue - adds a node to the instruction
/// selection queue.
-void AddToISelQueue(SDOperand N) DISABLE_INLINE {
+void AddToISelQueue(SDValue N) DISABLE_INLINE {
int Id = N.Val->getNodeId();
if (Id != -1 && !isQueued(Id)) {
ISelQueue.push_back(N.Val);
@@ -117,7 +117,7 @@ inline void UpdateQueue(const ISelQueueUpdater &ISQU) {
/// ReplaceUses - replace all uses of the old node F with the use
/// of the new node T.
-void ReplaceUses(SDOperand F, SDOperand T) DISABLE_INLINE {
+void ReplaceUses(SDValue F, SDValue T) DISABLE_INLINE {
ISelQueueUpdater ISQU(ISelQueue);
CurDAG->ReplaceAllUsesOfValueWith(F, T, &ISQU);
setSelected(F.Val->getNodeId());
@@ -126,7 +126,7 @@ void ReplaceUses(SDOperand F, SDOperand T) DISABLE_INLINE {
/// ReplaceUses - replace all uses of the old nodes F with the use
/// of the new nodes T.
-void ReplaceUses(const SDOperand *F, const SDOperand *T,
+void ReplaceUses(const SDValue *F, const SDValue *T,
unsigned Num) DISABLE_INLINE {
ISelQueueUpdater ISQU(ISelQueue);
CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num, &ISQU);
@@ -143,7 +143,7 @@ void ReplaceUses(SDNode *F, SDNode *T) DISABLE_INLINE {
ISelQueueUpdater ISQU(ISelQueue);
if (FNumVals != TNumVals) {
for (unsigned i = 0, e = std::min(FNumVals, TNumVals); i < e; ++i)
- CurDAG->ReplaceAllUsesOfValueWith(SDOperand(F, i), SDOperand(T, i), &ISQU);
+ CurDAG->ReplaceAllUsesOfValueWith(SDValue(F, i), SDValue(T, i), &ISQU);
} else {
CurDAG->ReplaceAllUsesWith(F, T, &ISQU);
}
@@ -153,7 +153,7 @@ void ReplaceUses(SDNode *F, SDNode *T) DISABLE_INLINE {
/// SelectRoot - Top level entry to DAG instruction selector.
/// Selects instructions starting at the root of the current DAG.
-SDOperand SelectRoot(SDOperand Root) {
+SDValue SelectRoot(SDValue Root) {
SelectRootInit();
unsigned NumBytes = (DAGSize + 7) / 8;
ISelQueued = new unsigned char[NumBytes];
@@ -176,7 +176,7 @@ SDOperand SelectRoot(SDOperand Root) {
// Skip already selected nodes.
if (isSelected(Node->getNodeId()))
continue;
- SDNode *ResNode = Select(SDOperand(Node, 0));
+ SDNode *ResNode = Select(SDValue(Node, 0));
// If node should not be replaced,
// continue with the next one.
if (ResNode == Node)
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 0225b1231e..67f3dbb69f 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -330,7 +330,7 @@ namespace llvm {
/// register number for the results of the node.
///
void EmitNode(SDNode *Node, bool IsClone,
- DenseMap<SDOperand, unsigned> &VRBaseMap);
+ DenseMap<SDValue, unsigned> &VRBaseMap);
/// EmitNoop - Emit a noop instruction.
///
@@ -349,19 +349,19 @@ namespace llvm {
/// EmitSubregNode - Generate machine code for subreg nodes.
///
void EmitSubregNode(SDNode *Node,
- DenseMap<SDOperand, unsigned> &VRBaseMap);
+ DenseMap<SDValue, unsigned> &VRBaseMap);
/// getVR - Return the virtual register corresponding to the specified result
/// of the specified node.
- unsigned getVR(SDOperand Op, DenseMap<SDOperand, unsigned> &VRBaseMap);
+ unsigned getVR(SDValue Op, DenseMap<SDValue, unsigned> &VRBaseMap);
/// getDstOfCopyToRegUse - If the only use of the specified result number of
/// node is a CopyToReg, return its destination register. Return 0 otherwise.
unsigned getDstOfOnlyCopyToRegUse(SDNode *Node, unsigned ResNo) const;
- void AddOperand(MachineInstr *MI, SDOperand Op, unsigned IIOpNum,
+ void AddOperand(MachineInstr *MI, SDValue Op, unsigned IIOpNum,
const TargetInstrDesc *II,
- DenseMap<SDOperand, unsigned> &VRBaseMap);
+ DenseMap<SDValue, unsigned> &VRBaseMap);
void AddMemOperand(MachineInstr *MI, const MachineMemOperand &MO);
@@ -371,11 +371,11 @@ namespace llvm {
/// implicit physical register output.
void EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
unsigned SrcReg,
- DenseMap<SDOperand, unsigned> &VRBaseMap);
+ DenseMap<SDValue, unsigned> &VRBaseMap);
void CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
const TargetInstrDesc &II,
- DenseMap<SDOperand, unsigned> &VRBaseMap);
+ DenseMap<SDValue, unsigned> &VRBaseMap);
/// EmitLiveInCopy - Emit a copy for a live in physical register. If the
/// physical register has only a single copy use, then coalesced the copy
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index fee46b32a6..692d9027c5 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -52,7 +52,7 @@ class SelectionDAG {
MachineModuleInfo *MMI;
/// Root - The root of the entire DAG. EntryNode - The starting token.
- SDOperand Root, EntryNode;
+ SDValue Root, EntryNode;
/// AllNodes - A linked list of nodes in the current DAG.
alist<SDNode, LargestSDNode> &AllNodes;
@@ -120,15 +120,15 @@ public:
/// getRoot - Return the root tag of the SelectionDAG.
///
- const SDOperand &getRoot() const { return Root; }
+ const SDValue &getRoot() const { return Root; }
/// getEntryNode - Return the token chain corresponding to the entry of the
/// function.
- const SDOperand &getEntryNode() const { return EntryNode; }
+ const SDValue &getEntryNode() const { return EntryNode; }
/// setRoot - Set the current root tag of the SelectionDAG.
///
- const SDOperand &setRoot(SDOperand N) {
+ const SDValue &setRoot(SDValue N) {
assert((!N.Val || N.getValueType() == MVT::Other) &&
"DAG root value is not a chain!");
return Root = N;
@@ -188,61 +188,61 @@ public:
//===--------------------------------------------------------------------===//
// Node creation methods.
//
- SDOperand getConstant(uint64_t Val, MVT VT, bool isTarget = false);
- SDOperand getConstant(const APInt &Val, MVT VT, bool isTarget = false);
- SDOperand getIntPtrConstant(uint64_t Val, bool isTarget = false);
- SDOperand getTargetConstant(uint64_t Val, MVT VT) {
+ SDValue getConstant(uint64_t Val, MVT VT, bool isTarget = false);
+ SDValue getConstant(const APInt &Val, MVT VT, bool isTarget = false);
+ SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false);
+ SDValue getTargetConstant(uint64_t Val, MVT VT) {
return getConstant(Val, VT, true);
}
- SDOperand getTargetConstant(const APInt &Val, MVT VT) {
+ SDValue getTargetConstant(const APInt &Val, MVT VT) {
return getConstant(Val, VT, true);
}
- SDOperand getConstantFP(double Val, MVT VT, bool isTarget = false);
- SDOperand getConstantFP(const APFloat& Val, MVT VT, bool isTarget = false);
- SDOperand getTargetConstantFP(double Val, MVT VT) {
+ SDValue getConstantFP(double Val, MVT VT, bool isTarget = false);
+ SDValue getConstantFP(const APFloat& Val, MVT VT, bool isTarget = false);
+ SDValue getTargetConstantFP(double Val, MVT VT) {
return getConstantFP(Val, VT, true);
}
- SDOperand getTargetConstantFP(const APFloat& Val, MVT VT) {
+ SDValue getTargetConstantFP(const APFloat& Val, MVT VT) {
return getConstantFP(Val, VT, true);
}
- SDOperand getGlobalAddress(const GlobalValue *GV, MVT VT,
+ SDValue getGlobalAddress(const GlobalValue *GV, MVT VT,
int offset = 0, bool isTargetGA = false);
- SDOperand getTargetGlobalAddress(const GlobalValue *GV, MVT VT,
+ SDValue getTargetGlobalAddress(const GlobalValue *GV, MVT VT,
int offset = 0) {
return getGlobalAddress(GV, VT, offset, true);
}
- SDOperand getFrameIndex(int FI, MVT VT, bool isTarget = false);
- SDOperand getTargetFrameIndex(int FI, MVT VT) {
+ SDValue getFrameIndex(int FI, MVT VT, bool isTarget = false);
+ SDValue getTargetFrameIndex(int FI, MVT VT) {
return getFrameIndex(FI, VT, true);
}
- SDOperand getJumpTable(int JTI, MVT VT, bool isTarget = false);
- SDOperand getTargetJumpTable(int JTI, MVT VT) {
+ SDValue getJumpTable(int JTI, MVT VT, bool isTarget = false);
+ SDValue getTargetJumpTable(int JTI, MVT VT) {
return getJumpTable(JTI, VT, true);
}
- SDOperand getConstantPool(Constant *C, MVT VT,
+ SDValue getConstantPool(Constant *C, MVT VT,
unsigned Align = 0, int Offs = 0, bool isT=false);
- SDOperand getTargetConstantPool(Constant *C, MVT VT,
+ SDValue getTargetConstantPool(Constant *C, MVT VT,
unsigned Align = 0, int Offset = 0) {
return getConstantPool(C, VT, Align, Offset, true);
}
- SDOperand getConstantPool(MachineConstantPoolValue *C, MVT VT,
+ SDValue getConstantPool(MachineConstantPoolValue *C, MVT VT,
unsigned Align = 0, int Offs = 0, bool isT=false);
- SDOperand getTargetConstantPool(MachineConstantPoolValue *C,
+ SDValue getTargetConstantPool(MachineConstantPoolValue *C,
MVT VT, unsigned Align = 0,
int Offset = 0) {
return getConstantPool(C, VT, Align, Offset, true);
}
- SDOperand getBasicBlock(MachineBasicBlock *MBB);
- SDOperand getExternalSymbol(const char *Sym, MVT VT);
- SDOperand getTargetExternalSymbol(const char *Sym, MVT VT);
- SDOperand getArgFlags(ISD::ArgFlagsTy Flags);
- SDOperand getValueType(MVT);
- SDOperand getRegister(unsigned Reg, MVT VT);
- SDOperand getDbgStopPoint(SDOperand Root, unsigned Line, unsigned Col,
+ SDValue getBasicBlock(MachineBasicBlock *MBB);
+ SDValue getExternalSymbol(const char *Sym, MVT VT);
+ SDValue getTargetExternalSymbol(const char *Sym, MVT VT);
+ SDValue getArgFlags(ISD::ArgFlagsTy Flags);
+ SDValue getValueType(MVT);
+ SDValue getRegister(unsigned Reg, MVT VT);
+ SDValue getDbgStopPoint(SDValue Root, unsigned Line, unsigned Col,
const CompileUnitDesc *CU);
- SDOperand getLabel(unsigned Opcode, SDOperand Root, unsigned LabelID);
+ SDValue getLabel(unsigned Opcode, SDValue Root, unsigned LabelID);
- SDOperand getCopyToReg(SDOperand Chain, unsigned Reg, SDOperand N) {
+ SDValue getCopyToReg(SDValue Chain, unsigned Reg, SDValue N) {
return getNode(ISD::CopyToReg, MVT::Other, Chain,
getRegister(Reg, N.getValueType()), N);
}
@@ -250,57 +250,57 @@ public:
// This version of the getCopyToReg method takes an extra operand, which
// indicates that there is potentially an incoming flag value (if Flag is not
// null) and that there should be a flag result.
- SDOperand getCopyToReg(SDOperand Chain, unsigned Reg, SDOperand N,
- SDOperand Flag) {
+ SDValue getCopyToReg(SDValue Chain, unsigned Reg, SDValue N,
+ SDValue Flag) {
const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
- SDOperand Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
+ SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Flag };
return getNode(ISD::CopyToReg, VTs, 2, Ops, Flag.Val ? 4 : 3);
}
- // Similar to last getCopyToReg() except parameter Reg is a SDOperand
- SDOperand getCopyToReg(SDOperand Chain, SDOperand Reg, SDOperand N,
- SDOperand Flag) {
+ // Similar to last getCopyToReg() except parameter Reg is a SDValue
+ SDValue getCopyToReg(SDValue Chain, SDValue Reg, SDValue N,
+ SDValue Flag) {
const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
- SDOperand Ops[] = { Chain, Reg, N, Flag };
+ SDValue Ops[] = { Chain, Reg, N, Flag };
return getNode(ISD::CopyToReg, VTs, 2, Ops, Flag.Val ? 4 : 3);
}
- SDOperand getCopyFromReg(SDOperand Chain, unsigned Reg, MVT VT) {
+ SDValue getCopyFromReg(SDValue Chain, unsigned Reg, MVT VT) {
const MVT *VTs = getNodeValueTypes(VT, MVT::Other);
- SDOperand Ops[] = { Chain, getRegister(Reg, VT) };
+ SDValue Ops[] = { Chain, getRegister(Reg, VT) };
return getNode(ISD::CopyFromReg, VTs, 2, Ops, 2);
}
// This version of the getCopyFromReg method takes an extra operand, which
// indicates that there is potentially an incoming flag value (if Flag is not
// null) and that there should be a flag result.
- SDOperand getCopyFromReg(SDOperand Chain, unsigned Reg, MVT VT,
- SDOperand Flag) {
+ SDValue getCopyFromReg(SDValue Chain, unsigned Reg, MVT VT,
+ SDValue Flag) {
const MVT *VTs = getNodeValueTypes(VT, MVT::Other, MVT::Flag);
- SDOperand Ops[] = { Chain, getRegister(Reg, VT), Flag };
+ SDValue Ops[] = { Chain, getRegister(Reg, VT), Flag };
return getNode(ISD::CopyFromReg, VTs, 3, Ops, Flag.Val ? 3 : 2);
}
- SDOperand getCondCode(ISD::CondCode Cond);
+ SDValue getCondCode(ISD::CondCode Cond);
/// getZeroExtendInReg - Return the expression required to zero extend the Op
/// value assuming it was the smaller SrcTy value.
- SDOperand getZeroExtendInReg(SDOperand Op, MVT SrcTy);
+ SDValue getZeroExtendInReg(SDValue Op, MVT SrcTy);
/// getCALLSEQ_START - Return a new CALLSEQ_START node, which always must have
/// a flag result (to ensure it's not CSE'd).
- SDOperand getCALLSEQ_START(SDOperand Chain, SDOperand Op) {
+ SDValue getCALLSEQ_START(SDValue Chain, SDValue Op) {
const MVT *VTs = getNodeValueTypes(MVT::Other, MVT::Flag);
- SDOperand Ops[] = { Chain, Op };
+ SDValue Ops[] = { Chain, Op };
return getNode(ISD::CALLSEQ_START, VTs, 2, Ops, 2);
}
/// getCALLSEQ_END - Return a new CALLSEQ_END node, which always must have a
/// flag result (to ensure it's not CSE'd).
- SDOperand getCALLSEQ_END(SDOperand Chain, SDOperand Op1, SDOperand Op2,
- SDOperand InFlag) {
+ SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
+ SDValue InFlag) {
SDVTList NodeTys = getVTList(MVT::Other, MVT::Flag);
- SmallVector<SDOperand, 4> Ops;
+ SmallVector<SDValue, 4> Ops;
Ops.push_back(Chain);
Ops.push_back(Op1);
Ops.push_back(Op2);
@@ -311,103 +311,103 @@ public:
/// getNode - Gets or creates the specified node.
///
- SDOperand getNode(unsigned Opcode, MVT VT);
- SDOperand getNode(unsigned Opcode, MVT VT, SDOperand N);
- SDOperand getNode(unsigned Opcode, MVT VT, SDOperand N1, SDOperand N2);
- SDOperand getNode(unsigned Opcode, MVT VT,
- SDOperand N1, SDOperand N2, SDOperand N3);
- SDOperand getNode(unsigned Opcode, MVT VT,
- SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4);
- SDOperand getNode(unsigned Opcode, MVT VT,
- SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4,
- SDOperand N5);
- SDOperand getNode(unsigned Opcode, MVT VT,
- const SDOperand *Ops, unsigned NumOps);
- SDOperand getNode(unsigned Opcode, MVT VT,
+ SDValue getNode(unsigned Opcode, MVT VT);
+ SDValue getNode(unsigned Opcode, MVT VT, SDValue N);
+ SDValue getNode(unsigned Opcode, MVT VT, SDValue N1, SDValue N2);
+ SDValue getNode(unsigned Opcode, MVT VT,
+ SDValue N1, SDValue N2, SDValue N3);
+ SDValue getNode(unsigned Opcode, MVT VT,
+ SDValue N1, SDValue N2, SDValue N3, SDValue N4);
+ SDValue getNode(unsigned Opcode, MVT VT,
+ SDValue N1, SDValue N2, SDValue N3, SDValue N4,
+ SDValue N5);
+ SDValue getNode(unsigned Opcode, MVT VT,
+ const SDValue *Ops, unsigned NumOps);
+ SDValue getNode(unsigned Opcode, MVT VT,
const SDUse *Ops, unsigned NumOps);
- SDOperand getNode(unsigned Opcode, const std::vector<MVT> &ResultTys,
- const SDOperand *Ops, unsigned NumOps);
- SDOperand getNode(unsigned Opcode, const MVT *VTs, unsigned NumVTs,
- const SDOperand *Ops, unsigned NumOps);
- SDOperand getNode(unsigned Opcode, SDVTList VTs);
- SDOperand getNode(unsigned Opcode, SDVTList VTs, SDOperand N);
- SDOperand getNode(unsigned Opcode, SDVTList VTs, SDOperand N1, SDOperand N2);
- SDOperand getNode(unsigned Opcode, SDVTList VTs,
- SDOperand N1, SDOperand N2, SDOperand N3);
- SDOperand getNode(unsigned Opcode, SDVTList VTs,
- SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4);
- SDOperand getNode(unsigned Opcode, SDVTList VTs,
- SDOperand N1, SDOperand N2, SDOperand N3, SDOperand N4,
- SDOperand N5);
- SDOperand getNode(unsigned Opcode, SDVTList VTs,
- const SDOperand *Ops, unsigned NumOps);
-
- SDOperand getMemcpy(SDOperand Chain, SDOperand Dst, SDOperand Src,
- SDOperand Size, unsigned Align,
+ SDValue getNode(unsigned Opcode, const std::vector<MVT> &ResultTys,
+ const SDValue *Ops, unsigned NumOps);
+ SDValue getNode(unsigned Opcode, const MVT *VTs, unsigned NumVTs,
+ const SDValue *Ops, unsigned NumOps);
+ SDValue getNode(unsigned Opcode, SDVTList VTs);
+ SDValue getNode(unsigned Opcode, SDVTList VTs, SDValue N);
+ SDValue getNode(unsigned Opcode, SDVTList VTs, SDValue N1, SDValue N2);
+ SDValue getNode(unsigned Opcode, SDVTList VTs,
+ SDValue N1, SDValue N2, SDValue N3);
+ SDValue getNode(unsigned Opcode, SDVTList VTs,
+ SDValue N1, SDValue N2, SDValue N3, SDValue N4);
+ SDValue getNode(unsigned Opcode, SDVTList VTs,
+ SDValue N1, SDValue N2, SDValue N3, SDValue N4,
+ SDValue N5);
+ SDValue getNode(unsigned Opcode, SDVTList VTs,
+ const SDValue *Ops, unsigned NumOps);
+
+ SDValue getMemcpy(SDValue Chain, SDValue Dst, SDValue Src,
+ SDValue Size, unsigned Align,
bool AlwaysInline,
const Value *DstSV, uint64_t DstSVOff,
const Value *SrcSV, uint64_t SrcSVOff);
- SDOperand getMemmove(SDOperand Chain, SDOperand Dst, SDOperand Src,
- SDOperand Size, unsigned Align,
+ SDValue getMemmove(SDValue Chain, SDValue Dst, SDValue Src,
+ SDValue Size, unsigned Align,
const Value *DstSV, uint64_t DstOSVff,
const Value *SrcSV, uint64_t SrcSVOff);
- SDOperand getMemset(SDOperand Chain, SDOperand Dst, SDOperand Src,
- SDOperand Size, unsigned Align,
+ SDValue getMemset(SDValue Chain, SDValue Dst, SDValue Src,
+ SDValue Size, unsigned Align,
const Value *DstSV, uint64_t DstSVOff);
/// getSetCC - Helper function to make it easier to build SetCC's if you just
- /// have an ISD::CondCode instead of an SDOperand.
+ /// have an ISD::CondCode instead of an SDValue.
///
- SDOperand getSetCC(MVT VT, SDOperand LHS, SDOperand RHS,
+ SDValue getSetCC(MVT VT, SDValue LHS, SDValue RHS,
ISD::CondCode Cond) {
return getNode(ISD::SETCC, VT, LHS, RHS, getCondCode(Cond));
}
/// getVSetCC - Helper function to make it easier to build VSetCC's nodes
- /// if you just have an ISD::CondCode instead of an SDOperand.
+ /// if you just have an ISD::CondCode instead of an SDValue.
///
- SDOperand getVSetCC(MVT VT, SDOperand LHS, SDOperand RHS,
+ SDValue getVSetCC(MVT VT, SDValue LHS, SDValue RHS,
ISD::CondCode Cond) {
return getNode(ISD::VSETCC, VT, LHS, RHS, getCondCode(Cond));
}
/// getSelectCC - Helper function to make it easier to build SelectCC's if you
- /// just have an ISD::CondCode instead of an SDOperand.
+ /// just have an ISD::CondCode instead of an SDValue.
///
- SDOperand getSelectCC(SDOperand LHS, SDOperand RHS,
- SDOperand True, SDOperand False, ISD::CondCode Cond) {
+ SDValue getSelectCC(SDValue LHS, SDValue RHS,
+ SDValue True, SDValue False, ISD::CondCode Cond) {
return getNode(ISD::SELECT_CC, True.getValueType(), LHS, RHS, True, False,
getCondCode(Cond));
}
/// getVAArg - VAArg produces a result and token chain, and takes a pointer
/// and a source value as input.
- SDOperand getVAArg(MVT VT, SDOperand Chain, SDOperand Ptr,
- SDOperand SV);
+ SDValue getVAArg(MVT VT, SDValue Chain, SDValue Ptr,
+ SDValue SV);
/// getAtomic - Gets a node for an atomic op, produces result and chain, takes
/// 3 operands
- SDOperand getAtomic(unsigned Opcode, SDOperand Chain, SDOperand Ptr,
- SDOperand Cmp, SDOperand Swp, const Value* PtrVal,
+ SDValue getAtomic(unsigned Opcode, SDValue Chain, SDValue Ptr,
+ SDValue Cmp, SDValue Swp, const Value* PtrVal,
unsigned Alignment=0);
/// getAtomic - Gets a node for an atomic op, produces result and chain, takes
/// 2 operands
- SDOperand getAtomic(unsigned Opcode, SDOperand Chain, SDOperand Ptr,
- SDOperand Val, const Value* PtrVal,
+ SDValue getAtomic(unsigned Opcode, SDValue Chain, SDValue Ptr,
+ SDValue Val, const Value* PtrVal,
unsigned Alignment = 0);
/// getMergeValues - Create a MERGE_VALUES node from the given operands.
/// Allowed to return something different (and simpler) if Simplify is true.
- SDOperand getMergeValues(const SDOperand *Ops, unsigned NumOps,
+ SDValue getMergeValues(const SDValue *Ops, unsigned NumOps,
bool Simplify = true);
/// getMergeValues - Create a MERGE_VALUES node from the given types and ops.
/// Allowed to return something different (and simpler) if Simplify is true.
/// May be faster than the above version if VTs is