diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 08dae42476..1e901931cc 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -181,9 +181,11 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) { // They also have instructions for converting between i64 and fp. setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); + setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); - + setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); + // FIXME: disable this lowered code. This generates 64-bit register values, // and we don't model the fact that the top part is clobbered by calls. We // need to flag these together so that the value isn't live across a call. |