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| author | Jim Laskey <jlaskey@mac.com> | 2006-12-15 14:32:57 +0000 |
|---|---|---|
| committer | Jim Laskey <jlaskey@mac.com> | 2006-12-15 14:32:57 +0000 |
| commit | ca367b4e259efdd9366d358addbb983cce7c4360 (patch) | |
| tree | 144b389ac95144b70a3c6e134600725c92c8b97f | |
| parent | b744c256e6df459689c3a3b4baee6948bba42b64 (diff) | |
Provide support for FP_TO_UINT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32599 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 08dae42476..1e901931cc 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -181,9 +181,11 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) { // They also have instructions for converting between i64 and fp. setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); + setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); - + setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); + // FIXME: disable this lowered code. This generates 64-bit register values, // and we don't model the fact that the top part is clobbered by calls. We // need to flag these together so that the value isn't live across a call. |