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authorAkira Hatanaka <ahatanak@gmail.com>2011-05-20 02:30:51 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-05-20 02:30:51 +0000
commitcd0f90f8317c8b59ed11256f8b0eeb54b3cc22e2 (patch)
tree049ace3616554989d44552c20befaf55f35277d0 /test/CodeGen
parentd992f6c6661e35b1a186a415667cbd3a91d37711 (diff)
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/Mips/i64arg.ll10
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/Mips/i64arg.ll b/test/CodeGen/Mips/i64arg.ll
index 8e8114b27c..560f2e9b08 100644
--- a/test/CodeGen/Mips/i64arg.ll
+++ b/test/CodeGen/Mips/i64arg.ll
@@ -4,24 +4,24 @@ define void @f1(i64 %ll1, float %f, i64 %ll, i32 %i, float %f2) nounwind {
entry:
; CHECK: addu $[[R1:[0-9]+]], $zero, $5
; CHECK: addu $[[R0:[0-9]+]], $zero, $4
+; CHECK: lw $25, %call16(ff1)
; CHECK: ori $6, ${{[0-9]+}}, 3855
; CHECK: ori $7, ${{[0-9]+}}, 22136
-; CHECK: lw $25, %call16(ff1)
; CHECK: jalr
tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind
-; CHECK: lw $[[R2:[0-9]+]], 96($sp)
-; CHECK: lw $[[R3:[0-9]+]], 100($sp)
+; CHECK: lw $25, %call16(ff2)
+; CHECK: lw $[[R2:[0-9]+]], 88($sp)
+; CHECK: lw $[[R3:[0-9]+]], 92($sp)
; CHECK: addu $4, $zero, $[[R2]]
; CHECK: addu $5, $zero, $[[R3]]
-; CHECK: lw $25, %call16(ff2)
; CHECK: jalr $25
tail call void @ff2(i64 %ll, double 3.000000e+00) nounwind
%sub = add nsw i32 %i, -1
; CHECK: sw $[[R0]], 24($sp)
; CHECK: sw $[[R1]], 28($sp)
+; CHECK: lw $25, %call16(ff3)
; CHECK: addu $6, $zero, $[[R2]]
; CHECK: addu $7, $zero, $[[R3]]
-; CHECK: lw $25, %call16(ff3)
; CHECK: jalr $25
tail call void @ff3(i32 %i, i64 %ll, i32 %sub, i64 %ll1) nounwind
ret void