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authorAlexander Kornienko <alexfh@google.com>2013-04-03 14:07:16 +0000
committerAlexander Kornienko <alexfh@google.com>2013-04-03 14:07:16 +0000
commite133bc868944822bf8961f825d3aa63d6fa48fb7 (patch)
treeebbd4a8040181471467a9737d90d94dc6b58b316 /test/CodeGen/X86
parent647735c781c5b37061ee03d6e9e6c7dda92218e2 (diff)
parent080e3c523e87ec68ca1ea5db4cd49816028dd8bd (diff)
Updating branches/google/stable to r178511stable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/google/stable@178655 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r--test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll (renamed from test/CodeGen/X86/Stats/2003-08-03-CallArgLiveRanges.ll)1
-rw-r--r--test/CodeGen/X86/2006-03-02-InstrSchedBug.ll (renamed from test/CodeGen/X86/Stats/2006-03-02-InstrSchedBug.ll)1
-rw-r--r--test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll (renamed from test/CodeGen/X86/Stats/2006-05-01-SchedCausingSpills.ll)1
-rw-r--r--test/CodeGen/X86/2006-05-02-InstrSched1.ll (renamed from test/CodeGen/X86/Stats/2006-05-02-InstrSched1.ll)1
-rw-r--r--test/CodeGen/X86/2006-05-02-InstrSched2.ll (renamed from test/CodeGen/X86/Stats/2006-05-02-InstrSched2.ll)1
-rw-r--r--test/CodeGen/X86/2006-05-11-InstrSched.ll (renamed from test/CodeGen/X86/Stats/2006-05-11-InstrSched.ll)1
-rw-r--r--test/CodeGen/X86/2008-02-18-TailMergingBug.ll (renamed from test/CodeGen/X86/Stats/2008-02-18-TailMergingBug.ll)1
-rw-r--r--test/CodeGen/X86/2008-10-27-CoalescerBug.ll (renamed from test/CodeGen/X86/Stats/2008-10-27-CoalescerBug.ll)1
-rw-r--r--test/CodeGen/X86/2009-02-25-CommuteBug.ll (renamed from test/CodeGen/X86/Stats/2009-02-25-CommuteBug.ll)1
-rw-r--r--test/CodeGen/X86/2009-02-26-MachineLICMBug.ll (renamed from test/CodeGen/X86/Stats/2009-02-26-MachineLICMBug.ll)1
-rw-r--r--test/CodeGen/X86/2009-03-23-MultiUseSched.ll (renamed from test/CodeGen/X86/Stats/2009-03-23-MultiUseSched.ll)1
-rw-r--r--test/CodeGen/X86/2009-04-16-SpillerUnfold.ll (renamed from test/CodeGen/X86/Stats/2009-04-16-SpillerUnfold.ll)1
-rw-r--r--test/CodeGen/X86/2010-01-18-DbgValue.ll25
-rw-r--r--test/CodeGen/X86/2010-01-19-OptExtBug.ll (renamed from test/CodeGen/X86/Stats/2010-01-19-OptExtBug.ll)1
-rw-r--r--test/CodeGen/X86/2010-05-25-DotDebugLoc.ll26
-rw-r--r--test/CodeGen/X86/2010-05-26-DotDebugLoc.ll25
-rw-r--r--test/CodeGen/X86/2010-05-28-Crash.ll19
-rw-r--r--test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll9
-rw-r--r--test/CodeGen/X86/2010-08-04-StackVariable.ll22
-rw-r--r--test/CodeGen/X86/2010-09-16-EmptyFilename.ll14
-rw-r--r--test/CodeGen/X86/2010-11-02-DbgParameter.ll11
-rw-r--r--test/CodeGen/X86/2010-12-02-MC-Set.ll4
-rw-r--r--test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll31
-rw-r--r--test/CodeGen/X86/2011-06-12-FastAllocSpill.ll (renamed from test/CodeGen/X86/Stats/2011-06-12-FastAllocSpill.ll)1
-rw-r--r--test/CodeGen/X86/2011-09-14-valcoalesce.ll2
-rw-r--r--test/CodeGen/X86/2012-03-26-PostRALICMBug.ll (renamed from test/CodeGen/X86/Stats/2012-03-26-PostRALICMBug.ll)1
-rw-r--r--test/CodeGen/X86/2012-11-30-handlemove-dbg.ll7
-rw-r--r--test/CodeGen/X86/2012-11-30-misched-dbg.ll20
-rw-r--r--test/CodeGen/X86/2012-11-30-regpres-dbg.ll5
-rw-r--r--test/CodeGen/X86/2013-01-09-DAGCombineBug.ll33
-rw-r--r--test/CodeGen/X86/2013-03-13-VEX-DestReg.ll31
-rw-r--r--test/CodeGen/X86/DbgValueOtherTargets.test4
-rw-r--r--test/CodeGen/X86/GC/erlang-gc.ll25
-rw-r--r--test/CodeGen/X86/MachineSink-DbgValue.ll13
-rw-r--r--test/CodeGen/X86/MachineSink-PHIUse.ll (renamed from test/CodeGen/X86/Stats/MachineSink-PHIUse.ll)1
-rw-r--r--test/CodeGen/X86/MergeConsecutiveStores.ll96
-rw-r--r--test/CodeGen/X86/Stats/lit.local.cfg8
-rw-r--r--test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll204
-rw-r--r--test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll213
-rw-r--r--test/CodeGen/X86/atom-call-reg-indirect.ll45
-rw-r--r--test/CodeGen/X86/atomic32.ll2
-rw-r--r--test/CodeGen/X86/atomic64.ll2
-rw-r--r--test/CodeGen/X86/avx-cvt.ll6
-rw-r--r--test/CodeGen/X86/avx-load-store.ll39
-rwxr-xr-xtest/CodeGen/X86/avx-sext.ll21
-rw-r--r--test/CodeGen/X86/bool-simplify.ll86
-rw-r--r--test/CodeGen/X86/complex-fca.ll3
-rw-r--r--test/CodeGen/X86/constant-pool-remat-0.ll (renamed from test/CodeGen/X86/Stats/constant-pool-remat-0.ll)1
-rw-r--r--test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll (renamed from test/CodeGen/X86/Stats/convert-2-addr-3-addr-inc64.ll)1
-rw-r--r--test/CodeGen/X86/dagcombine-cse.ll (renamed from test/CodeGen/X86/Stats/dagcombine-cse.ll)1
-rw-r--r--test/CodeGen/X86/dagcombine_unsafe_math.ll14
-rw-r--r--test/CodeGen/X86/dbg-byval-parameter.ll27
-rw-r--r--test/CodeGen/X86/dbg-const-int.ll13
-rw-r--r--test/CodeGen/X86/dbg-const.ll13
-rw-r--r--test/CodeGen/X86/dbg-declare-arg.ll19
-rw-r--r--test/CodeGen/X86/dbg-declare.ll4
-rw-r--r--test/CodeGen/X86/dbg-file-name.ll7
-rw-r--r--test/CodeGen/X86/dbg-i128-const.ll20
-rw-r--r--test/CodeGen/X86/dbg-large-unsigned-const.ll10
-rw-r--r--test/CodeGen/X86/dbg-merge-loc-entry.ll36
-rw-r--r--test/CodeGen/X86/dbg-prolog-end.ll10
-rw-r--r--test/CodeGen/X86/dbg-subrange.ll4
-rw-r--r--test/CodeGen/X86/dbg-value-dag-combine.ll12
-rw-r--r--test/CodeGen/X86/dbg-value-isel.ll18
-rw-r--r--test/CodeGen/X86/dbg-value-location.ll23
-rw-r--r--test/CodeGen/X86/dbg-value-range.ll13
-rw-r--r--test/CodeGen/X86/dwarf-comp-dir.ll4
-rw-r--r--test/CodeGen/X86/fast-isel-args-fail.ll10
-rw-r--r--test/CodeGen/X86/fast-isel-expect.ll4
-rw-r--r--test/CodeGen/X86/hoist-invariant-load.ll (renamed from test/CodeGen/X86/Stats/hoist-invariant-load.ll)1
-rw-r--r--test/CodeGen/X86/licm-nested.ll (renamed from test/CodeGen/X86/Stats/licm-nested.ll)1
-rw-r--r--test/CodeGen/X86/lit.local.cfg2
-rw-r--r--test/CodeGen/X86/misched-ilp.ll4
-rw-r--r--test/CodeGen/X86/movgs.ll6
-rw-r--r--test/CodeGen/X86/multiple-loop-post-inc.ll2
-rw-r--r--test/CodeGen/X86/phi-immediate-factoring.ll (renamed from test/CodeGen/X86/Stats/phi-immediate-factoring.ll)1
-rw-r--r--test/CodeGen/X86/pr15296.ll46
-rw-r--r--test/CodeGen/X86/pr15309.ll15
-rw-r--r--test/CodeGen/X86/pr3522.ll (renamed from test/CodeGen/X86/Stats/pr3522.ll)1
-rw-r--r--test/CodeGen/X86/prefetch.ll3
-rw-r--r--test/CodeGen/X86/rdseed.ll48
-rw-r--r--test/CodeGen/X86/regpressure.ll (renamed from test/CodeGen/X86/Stats/regpressure.ll)1
-rw-r--r--test/CodeGen/X86/sibcall.ll4
-rw-r--r--test/CodeGen/X86/sink-hoist.ll2
-rw-r--r--test/CodeGen/X86/tls.ll40
-rw-r--r--test/CodeGen/X86/twoaddr-coalesce-2.ll (renamed from test/CodeGen/X86/Stats/twoaddr-coalesce-2.ll)1
-rw-r--r--test/CodeGen/X86/twoaddr-pass-sink.ll (renamed from test/CodeGen/X86/Stats/twoaddr-pass-sink.ll)1
-rw-r--r--test/CodeGen/X86/unknown-location.ll9
-rw-r--r--test/CodeGen/X86/vec_align_i256.ll14
-rw-r--r--test/CodeGen/X86/vec_fpext.ll2
-rw-r--r--test/CodeGen/X86/vec_insert-6.ll (renamed from test/CodeGen/X86/Stats/vec_insert-6.ll)1
-rw-r--r--test/CodeGen/X86/vec_shuffle-19.ll (renamed from test/CodeGen/X86/Stats/vec_shuffle-19.ll)1
-rw-r--r--test/CodeGen/X86/vec_shuffle-20.ll (renamed from test/CodeGen/X86/Stats/vec_shuffle-20.ll)1
-rw-r--r--test/CodeGen/X86/wide-fma-contraction.ll20
-rw-r--r--test/CodeGen/X86/win32_sret.ll78
-rw-r--r--test/CodeGen/X86/win_ftol2.ll12
-rw-r--r--test/CodeGen/X86/xtest.ll11
-rw-r--r--test/CodeGen/X86/zero-remat.ll (renamed from test/CodeGen/X86/Stats/zero-remat.ll)1
98 files changed, 1369 insertions, 291 deletions
diff --git a/test/CodeGen/X86/Stats/2003-08-03-CallArgLiveRanges.ll b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
index 0af2445d7f..2e4cb1fe7e 100644
--- a/test/CodeGen/X86/Stats/2003-08-03-CallArgLiveRanges.ll
+++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; The old instruction selector used to load all arguments to a call up in
; registers, then start pushing them all onto the stack. This is bad news as
; it makes a ton of annoying overlapping live ranges. This code should not
diff --git a/test/CodeGen/X86/Stats/2006-03-02-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
index 1a3d74918d..7673124d5d 100644
--- a/test/CodeGen/X86/Stats/2006-03-02-InstrSchedBug.ll
+++ b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -stats 2>&1 | \
; RUN: grep asm-printer | grep 7
diff --git a/test/CodeGen/X86/Stats/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
index 5cba3efeef..faa3e21a93 100644
--- a/test/CodeGen/X86/Stats/2006-05-01-SchedCausingSpills.ll
+++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \
; RUN: not grep "Number of register spills"
; END.
diff --git a/test/CodeGen/X86/Stats/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
index 1c75f93915..0afddd8f87 100644
--- a/test/CodeGen/X86/Stats/2006-05-02-InstrSched1.ll
+++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \
; RUN: grep asm-printer | grep 14
;
diff --git a/test/CodeGen/X86/Stats/2006-05-02-InstrSched2.ll b/test/CodeGen/X86/2006-05-02-InstrSched2.ll
index 95eefa1e71..222b7a0b41 100644
--- a/test/CodeGen/X86/Stats/2006-05-02-InstrSched2.ll
+++ b/test/CodeGen/X86/2006-05-02-InstrSched2.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -stats 2>&1 | \
; RUN: grep asm-printer | grep 13
diff --git a/test/CodeGen/X86/Stats/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll
index 37c510786a..6912351d7b 100644
--- a/test/CodeGen/X86/Stats/2006-05-11-InstrSched.ll
+++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats -realign-stack=0 2>&1 | \
; RUN: grep "asm-printer" | grep 35
diff --git a/test/CodeGen/X86/Stats/2008-02-18-TailMergingBug.ll b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
index a1b973d7cc..363a6008a0 100644
--- a/test/CodeGen/X86/Stats/2008-02-18-TailMergingBug.ll
+++ b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
; PR1909
diff --git a/test/CodeGen/X86/Stats/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
index b2cf34cd20..0310a5dcb5 100644
--- a/test/CodeGen/X86/Stats/2008-10-27-CoalescerBug.ll
+++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
; Now this test spills one register. But a reload in the loop is cheaper than
; the divsd so it's a win.
diff --git a/test/CodeGen/X86/Stats/2009-02-25-CommuteBug.ll b/test/CodeGen/X86/2009-02-25-CommuteBug.ll
index 9cbf350940..9ea34e27a1 100644
--- a/test/CodeGen/X86/Stats/2009-02-25-CommuteBug.ll
+++ b/test/CodeGen/X86/2009-02-25-CommuteBug.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | not grep commuted
; rdar://6608609
diff --git a/test/CodeGen/X86/Stats/2009-02-26-MachineLICMBug.ll b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
index d50fe6f73a..68a9fafb6d 100644
--- a/test/CodeGen/X86/Stats/2009-02-26-MachineLICMBug.ll
+++ b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "5 machine-licm"
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s
; rdar://6627786
diff --git a/test/CodeGen/X86/Stats/2009-03-23-MultiUseSched.ll b/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
index d934ec9a88..351a1722a2 100644
--- a/test/CodeGen/X86/Stats/2009-03-23-MultiUseSched.ll
+++ b/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -o /dev/null -stats -info-output-file - > %t
; RUN: not grep spill %t
; RUN: not grep "%rsp" %t
diff --git a/test/CodeGen/X86/Stats/2009-04-16-SpillerUnfold.ll b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
index ad18a0c5b9..0607eda271 100644
--- a/test/CodeGen/X86/Stats/2009-04-16-SpillerUnfold.ll
+++ b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | grep "Number of modref unfolded"
; XFAIL: *
; 69408 removed the opportunity for this optimization to work
diff --git a/test/CodeGen/X86/2010-01-18-DbgValue.ll b/test/CodeGen/X86/2010-01-18-DbgValue.ll
index 7f2b8206b1..7dba332b1b 100644
--- a/test/CodeGen/X86/2010-01-18-DbgValue.ll
+++ b/test/CodeGen/X86/2010-01-18-DbgValue.ll
@@ -29,23 +29,24 @@ return: ; preds = %entry
declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3}
-!18 = metadata !{metadata !1}
!0 = metadata !{i32 786689, metadata !1, metadata !"my_r0", metadata !2, i32 11, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ]
-!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 11, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (%struct.Rect*)* @foo, null, null, null, i32 11} ; [ DW_TAG_subprogram ]
-!2 = metadata !{i32 786473, metadata !"b2.c", metadata !"/tmp/", metadata !3} ; [ DW_TAG_file_type ]
-!3 = metadata !{i32 786449, i32 0, i32 1, metadata !"b2.c", metadata !"/tmp/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0, null, null, metadata !18, null} ; [ DW_TAG_compile_unit ]
-!4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 11, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (%struct.Rect*)* @foo, null, null, null, i32 11} ; [ DW_TAG_subprogram ]
+!2 = metadata !{i32 786473, metadata !19} ; [ DW_TAG_file_type ]
+!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, metadata !""} ; [ DW_TAG_compile_unit ]
+!4 = metadata !{i32 786453, metadata !19, metadata !2, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
!5 = metadata !{metadata !6, metadata !7}
-!6 = metadata !{i32 786468, metadata !2, metadata !"double", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
-!7 = metadata !{i32 786451, metadata !2, metadata !"Rect", metadata !2, i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ]
+!6 = metadata !{i32 786468, metadata !19, metadata !2, metadata !"double", i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
+!7 = metadata !{i32 786451, metadata !19, metadata !2, metadata !"Rect", i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ]
!8 = metadata !{metadata !9, metadata !14}
-!9 = metadata !{i32 786445, metadata !7, metadata !"P1", metadata !2, i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ]
-!10 = metadata !{i32 786451, metadata !2, metadata !"Pt", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ]
+!9 = metadata !{i32 786445, metadata !19, metadata !7, metadata !"P1", i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ]
+!10 = metadata !{i32 786451, metadata !19, metadata !2, metadata !"Pt", i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ]
!11 = metadata !{metadata !12, metadata !13}
-!12 = metadata !{i32 786445, metadata !10, metadata !"x", metadata !2, i32 2, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ]
-!13 = metadata !{i32 786445, metadata !10, metadata !"y", metadata !2, i32 3, i64 64, i64 64, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ]
-!14 = metadata !{i32 786445, metadata !7, metadata !"P2", metadata !2, i32 8, i64 128, i64 64, i64 128, i32 0, metadata !10} ; [ DW_TAG_member ]
+!12 = metadata !{i32 786445, metadata !19, metadata !10, metadata !"x", i32 2, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ]
+!13 = metadata !{i32 786445, metadata !19, metadata !10, metadata !"y", i32 3, i64 64, i64 64, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ]
+!14 = metadata !{i32 786445, metadata !19, metadata !7, metadata !"P2", i32 8, i64 128, i64 64, i64 128, i32 0, metadata !10} ; [ DW_TAG_member ]
!15 = metadata !{i32 11, i32 0, metadata !1, null}
!16 = metadata !{i32 12, i32 0, metadata !17, null}
!17 = metadata !{i32 786443, metadata !1, i32 11, i32 0} ; [ DW_TAG_lexical_block ]
+!18 = metadata !{metadata !1}
+!19 = metadata !{metadata !"b2.c", metadata !"/tmp/"}
diff --git a/test/CodeGen/X86/Stats/2010-01-19-OptExtBug.ll b/test/CodeGen/X86/2010-01-19-OptExtBug.ll
index eb4a5c04a2..ec24e73c34 100644
--- a/test/CodeGen/X86/Stats/2010-01-19-OptExtBug.ll
+++ b/test/CodeGen/X86/2010-01-19-OptExtBug.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -disable-fp-elim -stats 2>&1 | not grep ext-opt
define fastcc i8* @S_scan_str(i8* %start, i32 %keep_quoted, i32 %keep_delims) nounwind ssp {
diff --git a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
index 5707befb9c..8ab93fcb97 100644
--- a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
+++ b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
@@ -199,25 +199,23 @@ declare float @copysignf(float, float) nounwind readnone
declare v