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author | Alexander Kornienko <alexfh@google.com> | 2013-04-03 14:07:16 +0000 |
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committer | Alexander Kornienko <alexfh@google.com> | 2013-04-03 14:07:16 +0000 |
commit | e133bc868944822bf8961f825d3aa63d6fa48fb7 (patch) | |
tree | ebbd4a8040181471467a9737d90d94dc6b58b316 /test/CodeGen/X86/2008-10-27-CoalescerBug.ll | |
parent | 647735c781c5b37061ee03d6e9e6c7dda92218e2 (diff) | |
parent | 080e3c523e87ec68ca1ea5db4cd49816028dd8bd (diff) |
Updating branches/google/stable to r178511stable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/google/stable@178655 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2008-10-27-CoalescerBug.ll')
-rw-r--r-- | test/CodeGen/X86/2008-10-27-CoalescerBug.ll | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll new file mode 100644 index 0000000000..0310a5dcb5 --- /dev/null +++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll @@ -0,0 +1,52 @@ +; REQUIRES: asserts +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s +; Now this test spills one register. But a reload in the loop is cheaper than +; the divsd so it's a win. + +define fastcc void @fourn(double* %data, i32 %isign) nounwind { +; CHECK: fourn +entry: + br label %bb + +bb: ; preds = %bb, %entry + %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2] + %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1] + %0 = add i32 %indvar93, 2 ; <i32> [#uses=1] + %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1] + br i1 %1, label %bb30.loopexit, label %bb + +; CHECK: %bb30.loopexit +; CHECK: divsd %xmm0 +; CHECK: movsd %xmm0, 16(%esp) +; CHECK: %bb3 +bb3: ; preds = %bb30.loopexit, %bb25, %bb3 + %2 = load i32* null, align 4 ; <i32> [#uses=1] + %3 = mul i32 %2, 0 ; <i32> [#uses=1] + %4 = icmp slt i32 0, %3 ; <i1> [#uses=1] + br i1 %4, label %bb18, label %bb3 + +bb18: ; preds = %bb3 + %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1] + %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1] + br label %bb24.preheader + +bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader + br label %bb22.preheader + +bb25: ; preds = %bb24.preheader + %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0] + %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1] + %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1] + br i1 %9, label %bb3, label %bb24.preheader + +bb24.preheader: ; preds = %bb25, %bb18 + %i3.122100 = or i32 0, 1 ; <i32> [#uses=2] + %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1] + br i1 %10, label %bb25, label %bb22.preheader + +bb30.loopexit: ; preds = %bb + %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1] + br label %bb3 +} + +declare double @sin(double) nounwind readonly |