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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-03-09 01:28:35 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-03-09 01:28:35 +0000 |
| commit | c6b018b7379f4e1bcc4166a07b17d08180ed776d (patch) | |
| tree | 83069a23e90ca116b1631b7fd8c57d2af1e7cfd4 /lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | |
| parent | d7f3e7d046ab0d4caad5237c9e49d22e5b0faf34 (diff) | |
PR9346: Prevent SimplifyDemandedBits from incorrectly introducing
INT_MIN % -1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127306 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp')
| -rw-r--r-- | lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index b12d4c3687..6e727ce6e3 100644 --- a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -684,6 +684,10 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, break; case Instruction::SRem: if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) { + // X % -1 demands all the bits because we don't want to introduce + // INT_MIN % -1 (== undef) by accident. + if (Rem->isAllOnesValue()) + break; APInt RA = Rem->getValue().abs(); if (RA.isPowerOf2()) { if (DemandedMask.ult(RA)) // srem won't affect demanded bits |