Rename SDOperand to SDValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 247 insertions, 247 deletions

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index ac9e399e9d..7d34ca2744 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -261,21 +261,21 @@ namespace {
     /// this value and returns the result as a ValueVTs value.  This uses 
     /// Chain/Flag as the input and updates them for the output Chain/Flag.
     /// If the Flag pointer is NULL, no flag is used.
-    SDOperand getCopyFromRegs(SelectionDAG &DAG,
-                              SDOperand &Chain, SDOperand *Flag) const;
+    SDValue getCopyFromRegs(SelectionDAG &DAG,
+                              SDValue &Chain, SDValue *Flag) const;
 
     /// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
     /// specified value into the registers specified by this object.  This uses 
     /// Chain/Flag as the input and updates them for the output Chain/Flag.
     /// If the Flag pointer is NULL, no flag is used.
-    void getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
-                       SDOperand &Chain, SDOperand *Flag) const;
+    void getCopyToRegs(SDValue Val, SelectionDAG &DAG,
+                       SDValue &Chain, SDValue *Flag) const;
     
     /// AddInlineAsmOperands - Add this value to the specified inlineasm node
     /// operand list.  This adds the code marker and includes the number of 
     /// values added into it.
     void AddInlineAsmOperands(unsigned Code, SelectionDAG &DAG,
-                              std::vector<SDOperand> &Ops) const;
+                              std::vector<SDValue> &Ops) const;
   };
 }
 
@@ -489,20 +489,20 @@ namespace llvm {
 class SelectionDAGLowering {
   MachineBasicBlock *CurMBB;
 
-  DenseMap<const Value*, SDOperand> NodeMap;
+  DenseMap<const Value*, SDValue> NodeMap;
 
   /// PendingLoads - Loads are not emitted to the program immediately.  We bunch
   /// them up and then emit token factor nodes when possible.  This allows us to
   /// get simple disambiguation between loads without worrying about alias
   /// analysis.
-  SmallVector<SDOperand, 8> PendingLoads;
+  SmallVector<SDValue, 8> PendingLoads;
 
   /// PendingExports - CopyToReg nodes that copy values to virtual registers
   /// for export to other blocks need to be emitted before any terminator
   /// instruction, but they have no other ordering requirements. We bunch them
   /// up and the emit a single tokenfactor for them just before terminator
   /// instructions.
-  std::vector<SDOperand> PendingExports;
+  std::vector<SDValue> PendingExports;
 
   /// Case - A struct to record the Value for a switch case, and the
   /// case's target basic block.
@@ -610,19 +610,19 @@ public:
   /// a store or any other node that may need to be ordered after any
   /// prior load instructions.
   ///
-  SDOperand getRoot() {
+  SDValue getRoot() {
     if (PendingLoads.empty())
       return DAG.getRoot();
 
     if (PendingLoads.size() == 1) {
-      SDOperand Root = PendingLoads[0];
+      SDValue Root = PendingLoads[0];
       DAG.setRoot(Root);
       PendingLoads.clear();
       return Root;
     }
 
     // Otherwise, we have to make a token factor node.
-    SDOperand Root = DAG.getNode(ISD::TokenFactor, MVT::Other,
+    SDValue Root = DAG.getNode(ISD::TokenFactor, MVT::Other,
                                  &PendingLoads[0], PendingLoads.size());
     PendingLoads.clear();
     DAG.setRoot(Root);
@@ -633,8 +633,8 @@ public:
   /// PendingLoad items, flush all the PendingExports items. It is necessary
   /// to do this before emitting a terminator instruction.
   ///
-  SDOperand getControlRoot() {
-    SDOperand Root = DAG.getRoot();
+  SDValue getControlRoot() {
+    SDValue Root = DAG.getRoot();
 
     if (PendingExports.empty())
       return Root;
@@ -679,10 +679,10 @@ public:
 
   void setCurrentBasicBlock(MachineBasicBlock *MBB) { CurMBB = MBB; }
 
-  SDOperand getValue(const Value *V);
+  SDValue getValue(const Value *V);
 
-  void setValue(const Value *V, SDOperand NewN) {
-    SDOperand &N = NodeMap[V];
+  void setValue(const Value *V, SDValue NewN) {
+    SDValue &N = NodeMap[V];
     assert(N.Val == 0 && "Already set a value for this node!");
     N = NewN;
   }
@@ -696,7 +696,7 @@ public:
                             unsigned Opc);
   bool isExportableFromCurrentBlock(Value *V, const BasicBlock *FromBB);
   void ExportFromCurrentBlock(Value *V);
-  void LowerCallTo(CallSite CS, SDOperand Callee, bool IsTailCall,
+  void LowerCallTo(CallSite CS, SDValue Callee, bool IsTailCall,
                    MachineBasicBlock *LandingPad = NULL);
 
   // Terminator instructions.
@@ -827,15 +827,15 @@ private:
 /// larger then ValueVT then AssertOp can be used to specify whether the extra
 /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT
 /// (ISD::AssertSext).
-static SDOperand getCopyFromParts(SelectionDAG &DAG,
-                                  const SDOperand *Parts,
+static SDValue getCopyFromParts(SelectionDAG &DAG,
+                                  const SDValue *Parts,
                                   unsigned NumParts,
                                   MVT PartVT,
                                   MVT ValueVT,
                                   ISD::NodeType AssertOp = ISD::DELETED_NODE) {
   assert(NumParts > 0 && "No parts to assemble!");
   TargetLowering &TLI = DAG.getTargetLoweringInfo();
-  SDOperand Val = Parts[0];
+  SDValue Val = Parts[0];
 
   if (NumParts > 1) {
     // Assemble the value from multiple parts.
@@ -849,7 +849,7 @@ static SDOperand getCopyFromParts(SelectionDAG &DAG,
       unsigned RoundBits = PartBits * RoundParts;
       MVT RoundVT = RoundBits == ValueBits ?
         ValueVT : MVT::getIntegerVT(RoundBits);
-      SDOperand Lo, Hi;
+      SDValue Lo, Hi;
 
       if (RoundParts > 2) {
         MVT HalfVT = MVT::getIntegerVT(RoundBits/2);
@@ -896,7 +896,7 @@ static SDOperand getCopyFromParts(SelectionDAG &DAG,
              "Part type doesn't match part!");
 
       // Assemble the parts into intermediate operands.
-      SmallVector<SDOperand, 8> Ops(NumIntermediates);
+      SmallVector<SDValue, 8> Ops(NumIntermediates);
       if (NumIntermediates == NumParts) {
         // If the register was not expanded, truncate or copy the value,
         // as appropriate.
@@ -967,15 +967,15 @@ static SDOperand getCopyFromParts(SelectionDAG &DAG,
     return DAG.getNode(ISD::BIT_CONVERT, ValueVT, Val);
 
   assert(0 && "Unknown mismatch!");
-  return SDOperand();
+  return SDValue();
 }
 
 /// getCopyToParts - Create a series of nodes that contain the specified value
 /// split into legal parts.  If the parts contain more bits than Val, then, for
 /// integers, ExtendKind can be used to specify how to generate the extra bits.
 static void getCopyToParts(SelectionDAG &DAG,
-                           SDOperand Val,
-                           SDOperand *Parts,
+                           SDValue Val,
+                           SDValue *Parts,
                            unsigned NumParts,
                            MVT PartVT,
                            ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
@@ -1039,7 +1039,7 @@ static void getCopyToParts(SelectionDAG &DAG,
       unsigned RoundParts = 1 << Log2_32(NumParts);
       unsigned RoundBits = RoundParts * PartBits;
       unsigned OddParts = NumParts - RoundParts;
-      SDOperand OddVal = DAG.getNode(ISD::SRL, ValueVT, Val,
+      SDValue OddVal = DAG.getNode(ISD::SRL, ValueVT, Val,
                                      DAG.getConstant(RoundBits,
                                                      TLI.getShiftAmountTy()));
       getCopyToParts(DAG, OddVal, Parts + RoundParts, OddParts, PartVT);
@@ -1060,8 +1060,8 @@ static void getCopyToParts(SelectionDAG &DAG,
       for (unsigned i = 0; i < NumParts; i += StepSize) {
         unsigned ThisBits = StepSize * PartBits / 2;
         MVT ThisVT = MVT::getIntegerVT (ThisBits);
-        SDOperand &Part0 = Parts[i];
-        SDOperand &Part1 = Parts[i+StepSize/2];
+        SDValue &Part0 = Parts[i];
+        SDValue &Part1 = Parts[i+StepSize/2];
 
         Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, ThisVT, Part0,
                             DAG.getConstant(1, PtrVT));
@@ -1113,7 +1113,7 @@ static void getCopyToParts(SelectionDAG &DAG,
   assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
 
   // Split the vector into intermediate operands.
-  SmallVector<SDOperand, 8> Ops(NumIntermediates);
+  SmallVector<SDValue, 8> Ops(NumIntermediates);
   for (unsigned i = 0; i != NumIntermediates; ++i)
     if (IntermediateVT.isVector())
       Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR,
@@ -1143,8 +1143,8 @@ static void getCopyToParts(SelectionDAG &DAG,
 }
 
 
-SDOperand SelectionDAGLowering::getValue(const Value *V) {
-  SDOperand &N = NodeMap[V];
+SDValue SelectionDAGLowering::getValue(const Value *V) {
+  SDValue &N = NodeMap[V];
   if (N.Val) return N;
   
   if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(V))) {
@@ -1168,18 +1168,18 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
 
     if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
       visit(CE->getOpcode(), *CE);
-      SDOperand N1 = NodeMap[V];
+      SDValue N1 = NodeMap[V];
       assert(N1.Val && "visit didn't populate the ValueMap!");
       return N1;
     }
     
     if (isa<ConstantStruct>(C) || isa<ConstantArray>(C)) {
-      SmallVector<SDOperand, 4> Constants;
+      SmallVector<SDValue, 4> Constants;
       for (User::const_op_iterator OI = C->op_begin(), OE = C->op_end();
            OI != OE; ++OI) {
         SDNode *Val = getValue(*OI).Val;
         for (unsigned i = 0, e = Val->getNumValues(); i != e; ++i)
-          Constants.push_back(SDOperand(Val, i));
+          Constants.push_back(SDValue(Val, i));
       }
       return DAG.getMergeValues(&Constants[0], Constants.size());
     }
@@ -1189,9 +1189,9 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
              "Unknown array constant!");
       unsigned NumElts = ATy->getNumElements();
       if (NumElts == 0)
-        return SDOperand(); // empty array
+        return SDValue(); // empty array
       MVT EltVT = TLI.getValueType(ATy->getElementType());
-      SmallVector<SDOperand, 4> Constants(NumElts);
+      SmallVector<SDValue, 4> Constants(NumElts);
       for (unsigned i = 0, e = NumElts; i != e; ++i) {
         if (isa<UndefValue>(C))
           Constants[i] = DAG.getNode(ISD::UNDEF, EltVT);
@@ -1208,8 +1208,8 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
              "Unknown struct constant!");
       unsigned NumElts = STy->getNumElements();
       if (NumElts == 0)
-        return SDOperand(); // empty struct
-      SmallVector<SDOperand, 4> Constants(NumElts);
+        return SDValue(); // empty struct
+      SmallVector<SDValue, 4> Constants(NumElts);
       for (unsigned i = 0, e = NumElts; i != e; ++i) {
         MVT EltVT = TLI.getValueType(STy->getElementType(i));
         if (isa<UndefValue>(C))
@@ -1227,7 +1227,7 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
     
     // Now that we know the number and type of the elements, get that number of
     // elements into the Ops array based on what kind of constant it is.
-    SmallVector<SDOperand, 16> Ops;
+    SmallVector<SDValue, 16> Ops;
     if (ConstantVector *CP = dyn_cast<ConstantVector>(C)) {
       for (unsigned i = 0; i != NumElements; ++i)
         Ops.push_back(getValue(CP->getOperand(i)));
@@ -1236,7 +1236,7 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
              "Unknown vector constant!");
       MVT EltVT = TLI.getValueType(VecTy->getElementType());
 
-      SDOperand Op;
+      SDValue Op;
       if (isa<UndefValue>(C))
         Op = DAG.getNode(ISD::UNDEF, EltVT);
       else if (EltVT.isFloatingPoint())
@@ -1263,7 +1263,7 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
   assert(InReg && "Value not in map!");
   
   RegsForValue RFV(TLI, InReg, V->getType());
-  SDOperand Chain = DAG.getEntryNode();
+  SDValue Chain = DAG.getEntryNode();
   return RFV.getCopyFromRegs(DAG, Chain, NULL);
 }
 
@@ -1274,10 +1274,10 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
     return;
   }
   
-  SmallVector<SDOperand, 8> NewValues;
+  SmallVector<SDValue, 8> NewValues;
   NewValues.push_back(getControlRoot());
   for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {  
-    SDOperand RetOp = getValue(I.getOperand(i));
+    SDValue RetOp = getValue(I.getOperand(i));
 
     SmallVector<MVT, 4> ValueVTs;
     ComputeValueVTs(TLI, I.getOperand(i)->getType(), ValueVTs);
@@ -1294,7 +1294,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
 
       unsigned NumParts = TLI.getNumRegisters(VT);
       MVT PartVT = TLI.getRegisterType(VT);
-      SmallVector<SDOperand, 4> Parts(NumParts);
+      SmallVector<SDValue, 4> Parts(NumParts);
       ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
   
       const Function *F = I.getParent()->getParent();
@@ -1303,7 +1303,7 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
       else if (F->paramHasAttr(0, ParamAttr::ZExt))
         ExtendKind = ISD::ZERO_EXTEND;
 
-      getCopyToParts(DAG, SDOperand(RetOp.Val, RetOp.ResNo + j),
+      getCopyToParts(DAG, SDValue(RetOp.Val, RetOp.ResNo + j),
                      &Parts[0], NumParts, PartVT, ExtendKind);
 
       for (unsigned i = 0; i < NumParts; ++i) {
@@ -1590,8 +1590,8 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
 /// visitSwitchCase - Emits the necessary code to represent a single node in
 /// the binary search tree resulting from lowering a switch instruction.
 void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
-  SDOperand Cond;
-  SDOperand CondLHS = getValue(CB.CmpLHS);
+  SDValue Cond;
+  SDValue CondLHS = getValue(CB.CmpLHS);
   
   // Build the setcc now. 
   if (CB.CmpMHS == NULL) {
@@ -1600,7 +1600,7 @@ void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
     if (CB.CmpRHS == ConstantInt::getTrue() && CB.CC == ISD::SETEQ)
       Cond = CondLHS;
     else if (CB.CmpRHS == ConstantInt::getFalse() && CB.CC == ISD::SETEQ) {
-      SDOperand True = DAG.getConstant(1, CondLHS.getValueType());
+      SDValue True = DAG.getConstant(1, CondLHS.getValueType());
       Cond = DAG.getNode(ISD::XOR, CondLHS.getValueType(), CondLHS, True);
     } else
       Cond = DAG.getSetCC(MVT::i1, CondLHS, getValue(CB.CmpRHS), CB.CC);
@@ -1610,13 +1610,13 @@ void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
     uint64_t Low = cast<ConstantInt>(CB.CmpLHS)->getSExtValue();
     uint64_t High  = cast<ConstantInt>(CB.CmpRHS)->getSExtValue();
 
-    SDOperand CmpOp = getValue(CB.CmpMHS);
+    SDValue CmpOp = getValue(CB.CmpMHS);
     MVT VT = CmpOp.getValueType();
 
     if (cast<ConstantInt>(CB.CmpLHS)->isMinValue(true)) {
       Cond = DAG.getSetCC(MVT::i1, CmpOp, DAG.getConstant(High, VT), ISD::SETLE);
     } else {
-      SDOperand SUB = DAG.getNode(ISD::SUB, VT, CmpOp, DAG.getConstant(Low, VT));
+      SDValue SUB = DAG.getNode(ISD::SUB, VT, CmpOp, DAG.getConstant(Low, VT));
       Cond = DAG.getSetCC(MVT::i1, SUB,
                           DAG.getConstant(High-Low, VT), ISD::SETULE);
     }
@@ -1637,10 +1637,10 @@ void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
   // fall through to the lhs instead of the rhs block.
   if (CB.TrueBB == NextBlock) {
     std::swap(CB.TrueBB, CB.FalseBB);
-    SDOperand True = DAG.getConstant(1, Cond.getValueType());
+    SDValue True = DAG.getConstant(1, Cond.getValueType());
     Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
   }
-  SDOperand BrCond = DAG.getNode(ISD::BRCOND, MVT::Other, getControlRoot(), Cond,
+  SDValue BrCond = DAG.getNode(ISD::BRCOND, MVT::Other, getControlRoot(), Cond,
                                  DAG.getBasicBlock(CB.TrueBB));
   if (CB.FalseBB == NextBlock)
     DAG.setRoot(BrCond);
@@ -1654,8 +1654,8 @@ void SelectionDAGLowering::visitJumpTable(SelectionDAGISel::JumpTable &JT) {
   // Emit the code for the jump table
   assert(JT.Reg != -1U && "Should lower JT Header first!");
   MVT PTy = TLI.getPointerTy();
-  SDOperand Index = DAG.getCopyFromReg(getControlRoot(), JT.Reg, PTy);
-  SDOperand Table = DAG.getJumpTable(JT.JTI, PTy);
+  SDValue Index = DAG.getCopyFromReg(getControlRoot(), JT.Reg, PTy);
+  SDValue Table = DAG.getJumpTable(JT.JTI, PTy);
   DAG.setRoot(DAG.getNode(ISD::BR_JT, MVT::Other, Index.getValue(1),
                           Table, Index));
   return;
@@ -1668,9 +1668,9 @@ void SelectionDAGLowering::visitJumpTableHeader(SelectionDAGISel::JumpTable &JT,
   // Subtract the lowest switch case value from the value being switched on
   // and conditional branch to default mbb if the result is greater than the
   // difference between smallest and largest cases.
-  SDOperand SwitchOp = getValue(JTH.SValue);
+  SDValue SwitchOp = getValue(JTH.SValue);
   MVT VT = SwitchOp.getValueType();
-  SDOperand SUB = DAG.getNode(ISD::SUB, VT, SwitchOp,
+  SDValue SUB = DAG.getNode(ISD::SUB, VT, SwitchOp,
                               DAG.getConstant(JTH.First, VT));
   
   // The SDNode we just created, which holds the value being switched on
@@ -1684,13 +1684,13 @@ void SelectionDAGLowering::visitJumpTableHeader(SelectionDAGISel::JumpTable &JT,
     SwitchOp = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(), SUB);
   
   unsigned JumpTableReg = FuncInfo.MakeReg(TLI.getPointerTy());
-  SDOperand CopyTo = DAG.getCopyToReg(getControlRoot(), JumpTableReg, SwitchOp);
+  SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), JumpTableReg, SwitchOp);
   JT.Reg = JumpTableReg;
 
   // Emit the range check for the jump table, and branch to the default
   // block for the switch statement if the value being switched on exceeds
   // the largest case in the switch.
-  SDOperand CMP = DAG.getSetCC(TLI.getSetCCResultType(SUB), SUB,
+  SDValue CMP = DAG.getSetCC(TLI.getSetCCResultType(SUB), SUB,
                                DAG.getConstant(JTH.Last-JTH.First,VT),
                                ISD::SETUGT);
 
@@ -1701,7 +1701,7 @@ void SelectionDAGLowering::visitJumpTableHeader(SelectionDAGISel::JumpTable &JT,
   if (++BBI != CurMBB->getParent()->end())
     NextBlock = BBI;
 
-  SDOperand BrCond = DAG.getNode(ISD::BRCOND, MVT::Other, CopyTo, CMP,
+  SDValue BrCond = DAG.getNode(ISD::BRCOND, MVT::Other, CopyTo, CMP,
                                  DAG.getBasicBlock(JT.Default));
 
   if (JT.MBB == NextBlock)
@@ -1717,29 +1717,29 @@ void SelectionDAGLowering::visitJumpTableHeader(SelectionDAGISel::JumpTable &JT,
 /// suitable for "bit tests"
 void SelectionDAGLowering::visitBitTestHeader(SelectionDAGISel::BitTestBlock &B) {
   // Subtract the minimum value
-  SDOperand SwitchOp = getValue(B.SValue);
+  SDValue SwitchOp = getValue(B.SValue);
   MVT VT = SwitchOp.getValueType();
-  SDOperand SUB = DAG.getNode(ISD::SUB, VT, SwitchOp,
+  SDValue SUB = DAG.getNode(ISD::SUB, VT, SwitchOp,
                               DAG.getConstant(B.First, VT));
 
   // Check range
-  SDOperand RangeCmp = DAG.getSetCC(TLI.getSetCCResultType(SUB), SUB,
+  SDValue RangeCmp = DAG.getSetCC(TLI.getSetCCResultType(SUB), SUB,
                                     DAG.getConstant(B.Range, VT),
                                     ISD::SETUGT);
 
-  SDOperand ShiftOp;
+  SDValue ShiftOp;
   if (VT.bitsGT(TLI.getShiftAmountTy()))
     ShiftOp = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), SUB);
   else
     ShiftOp = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), SUB);
 
   // Make desired shift
-  SDOperand SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
+  SDValue SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
                                     DAG.getConstant(1, TLI.getPointerTy()),
                                     ShiftOp);
 
   unsigned SwitchReg = FuncInfo.MakeReg(TLI.getPointerTy());
-  SDOperand CopyTo = DAG.getCopyToReg(getControlRoot(), SwitchReg, SwitchVal);
+  SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), SwitchReg, SwitchVal);
   B.Reg = SwitchReg;
 
   // Set NextBlock to be the MBB immediately after the current one, if any.
@@ -1754,7 +1754,7 @@ void SelectionDAGLowering::visitBitTestHeader(SelectionDAGISel::BitTestBlock &B)
   CurMBB->addSuccessor(B.Default);
   CurMBB->addSuccessor(MBB);
 
-  SDOperand BrRange = DAG.getNode(ISD::BRCOND, MVT::Other, CopyTo, RangeCmp,
+  SDValue BrRange = DAG.getNode(ISD::BRCOND, MVT::Other, CopyTo, RangeCmp,
                                   DAG.getBasicBlock(B.Default));
   
   if (MBB == NextBlock)
@@ -1771,19 +1771,19 @@ void SelectionDAGLowering::visitBitTestCase(MachineBasicBlock* NextMBB,
                                             unsigned Reg,
                                             SelectionDAGISel::BitTestCase &B) {
   // Emit bit tests and jumps
-  SDOperand SwitchVal = DAG.getCopyFromReg(getControlRoot(), Reg, 
+  SDValue SwitchVal = DAG.getCopyFromReg(getControlRoot(), Reg, 
                                            TLI.getPointerTy());
   
-  SDOperand AndOp = DAG.getNode(ISD::AND, TLI.getPointerTy(), SwitchVal,
+  SDValue AndOp = DAG.getNode(ISD::AND, TLI.getPointerTy(), SwitchVal,
                                 DAG.getConstant(B.Mask, TLI.getPointerTy()));
-  SDOperand AndCmp = DAG.getSetCC(TLI.getSetCCResultType(AndOp), AndOp,
+  SDValue AndCmp = DAG.getSetCC(TLI.getSetCCResultType(AndOp), AndOp,
                                   DAG.getConstant(0, TLI.getPointerTy()),
                                   ISD::SETNE);
 
   CurMBB->addSuccessor(B.TargetBB);
   CurMBB->addSuccessor(NextMBB);
   
-  SDOperand BrAnd = DAG.getNode(ISD::BRCOND, MVT::Other, getControlRoot(),
+  SDValue BrAnd = DAG.getNode(ISD::BRCOND, MVT::Other, getControlRoot(),
                                 AndCmp, DAG.getBasicBlock(B.TargetBB));
 
   // Set NextBlock to be the MBB immediately after the current one, if any.
@@ -2378,7 +2378,7 @@ void SelectionDAGLowering::visitSub(User &I) {
         std::vector<Constant*> NZ(VL, ConstantFP::getNegativeZero(ElTy));
         Constant *CNZ = ConstantVector::get(&NZ[0], NZ.size());
         if (CV == CNZ) {
-          SDOperand Op2 = getValue(I.getOperand(1));
+          SDValue Op2 = getValue(I.getOperand(1));
           setValue(&I, DAG.getNode(ISD::FNEG, Op2.getValueType(), Op2));
           return;
         }
@@ -2388,7 +2388,7 @@ void SelectionDAGLowering::visitSub(User &I) {
   if (Ty->isFloatingPoint()) {
     if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
       if (CFP->isExactlyValue(ConstantFP::getNegativeZero(Ty)->getValueAPF())) {
-        SDOperand Op2 = getValue(I.getOperand(1));
+        SDValue Op2 = getValue(I.getOperand(1));
         setValue(&I, DAG.getNode(ISD::FNEG, Op2.getValueType(), Op2));
         return;
       }
@@ -2398,15 +2398,15 @@ void SelectionDAGLowering::visitSub(User &I) {
 }
 
 void SelectionDAGLowering::visitBinary(User &I, unsigned OpCode) {
-  SDOperand Op1 = getValue(I.getOperand(0));
-  SDOperand Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
   
   setValue(&I, DAG.getNode(OpCode, Op1.getValueType(), Op1, Op2));
 }
 
 void SelectionDAGLowering::visitShift(User &I, unsigned Opcode) {
-  SDOperand Op1 = getValue(I.getOperand(0));
-  SDOperand Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
   
   if (TLI.getShiftAmountTy().bitsLT(Op2.getValueType()))
     Op2 = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), Op2);
@@ -2422,8 +2422,8 @@ void SelectionDAGLowering::visitICmp(User &I) {
     predicate = IC->getPredicate();
   else if (ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
     predicate = ICmpInst::Predicate(IC->getPredicate());
-  SDOperand Op1 = getValue(I.getOperand(0));
-  SDOperand Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
   ISD::CondCode Opcode;
   switch (predicate) {
     case ICmpInst::ICMP_EQ  : Opcode = ISD::SETEQ; break;
@@ -2450,8 +2450,8 @@ void SelectionDAGLowering::visitFCmp(User &I) {
     predicate = FC->getPredicate();
   else if (ConstantExpr *FC = dyn_cast<ConstantExpr>(&I))
     predicate = FCmpInst::Predicate(FC->getPredicate());
-  SDOperand Op1 = getValue(I.getOperand(0));
-  SDOperand Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
   ISD::CondCode Condition, FOC, FPC;
   switch (predicate) {
     case FCmpInst::FCMP_FALSE: FOC = FPC = ISD::SETFALSE; break;
@@ -2488,8 +2488,8 @@ void SelectionDAGLowering::visitVICmp(User &I) {
     predicate = IC->getPredicate();
   else if (ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
     predicate = ICmpInst::Predicate(IC->getPredicate());
-  SDOperand Op1 = getValue(I.getOperand(0));
-  SDOperand Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
   ISD::CondCode Opcode;
   switch (predicate) {
     case ICmpInst::ICMP_EQ  : Opcode = ISD::SETEQ; break;
@@ -2516,8 +2516,8 @@ void SelectionDAGLowering::visitVFCmp(User &I) {
     predicate = FC->getPredicate();
   else if (ConstantExpr *FC = dyn_cast<ConstantExpr>(&I))
     predicate = FCmpInst::Predicate(FC->getPredicate());
-  SDOperand Op1 = getValue(I.getOperand(0));
-  SDOperand Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
   ISD::CondCode Condition, FOC, FPC;
   switch (predicate) {
     case FCmpInst::FCMP_FALSE: FOC = FPC = ISD::SETFALSE; break;
@@ -2552,9 +2552,9 @@ void SelectionDAGLowering::visitVFCmp(User &I) {
 }
 
 void SelectionDAGLowering::visitSelect(User &I) {
-  SDOperand Cond     = getValue(I.getOperand(0));
-  SDOperand TrueVal  = getValue(I.getOperand(1));
-  SDOperand FalseVal = getValue(I.getOperand(2));
+  SDValue Cond     = getValue(I.getOperand(0));
+  SDValue TrueVal  = getValue(I.getOperand(1));
+  SDValue FalseVal = getValue(I.getOperand(2));
   setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond,
                            TrueVal, FalseVal));
 }
@@ -2562,7 +2562,7 @@ void SelectionDAGLowering::visitSelect(User &I) {
 
 void SelectionDAGLowering::visitTrunc(User &I) {
   // TruncInst cannot be a no-op cast because sizeof(src) > sizeof(dest).
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::TRUNCATE, DestVT, N));
 }
@@ -2570,7 +2570,7 @@ void SelectionDAGLowering::visitTrunc(User &I) {
 void SelectionDAGLowering::visitZExt(User &I) {
   // ZExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
   // ZExt also can't be a cast to bool for same reason. So, nothing much to do
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, DestVT, N));
 }
@@ -2578,49 +2578,49 @@ void SelectionDAGLowering::visitZExt(User &I) {
 void SelectionDAGLowering::visitSExt(User &I) {
   // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
   // SExt also can't be a cast to bool for same reason. So, nothing much to do
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, DestVT, N));
 }
 
 void SelectionDAGLowering::visitFPTrunc(User &I) {
   // FPTrunc is never a no-op cast, no need to check
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_ROUND, DestVT, N, DAG.getIntPtrConstant(0)));
 }
 
 void SelectionDAGLowering::visitFPExt(User &I){ 
   // FPTrunc is never a no-op cast, no need to check
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_EXTEND, DestVT, N));
 }
 
 void SelectionDAGLowering::visitFPToUI(User &I) { 
   // FPToUI is never a no-op cast, no need to check
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_TO_UINT, DestVT, N));
 }
 
 void SelectionDAGLowering::visitFPToSI(User &I) {
   // FPToSI is never a no-op cast, no need to check
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_TO_SINT, DestVT, N));
 }
 
 void SelectionDAGLowering::visitUIToFP(User &I) { 
   // UIToFP is never a no-op cast, no need to check
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::UINT_TO_FP, DestVT, N));
 }
 
 void SelectionDAGLowering::visitSIToFP(User &I){ 
   // UIToFP is never a no-op cast, no need to check
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::SINT_TO_FP, DestVT, N));
 }
@@ -2628,10 +2628,10 @@ void SelectionDAGLowering::visitSIToFP(User &I){
 void SelectionDAGLowering::visitPtrToInt(User &I) {
   // What to do depends on the size of the integer and the size of the pointer.
   // We can either truncate, zero extend, or no-op, accordingly.
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT SrcVT = N.getValueType();
   MVT DestVT = TLI.getValueType(I.getType());
-  SDOperand Result;
+  SDValue Result;
   if (DestVT.bitsLT(SrcVT))
     Result = DAG.getNode(ISD::TRUNCATE, DestVT, N);
   else 
@@ -2643,7 +2643,7 @@ void SelectionDAGLowering::visitPtrToInt(User &I) {
 void SelectionDAGLowering::visitIntToPtr(User &I) {
   // What to do depends on the size of the integer and the size of the pointer.
   // We can either truncate, zero extend, or no-op, accordingly.
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT SrcVT = N.getValueType();
   MVT DestVT = TLI.getValueType(I.getType());
   if (DestVT.bitsLT(SrcVT))
@@ -2654,7 +2654,7 @@ void SelectionDAGLowering::visitIntToPtr(User &I) {
 }
 
 void SelectionDAGLowering::visitBitCast(User &I) { 
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   MVT DestVT = TLI.getValueType(I.getType());
 
   // BitCast assures us that source and destination are the same size so this 
@@ -2666,9 +2666,9 @@ void SelectionDAGLowering::visitBitCast(User &I) {
 }
 
 void SelectionDAGLowering::visitInsertElement(User &I) {
-  SDOperand InVec = getValue(I.getOperand(0));
-  SDOperand InVal = getValue(I.getOperand(1));
-  SDOperand InIdx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(),
+  SDValue InVec = getValue(I.getOperand(0));
+  SDValue InVal = getValue(I.getOperand(1));
+  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(),
                                 getValue(I.getOperand(2)));
 
   setValue(&I, DAG.getNode(ISD::INSERT_VECTOR_ELT,
@@ -2677,17 +2677,17 @@ void SelectionDAGLowering::visitInsertElement(User &I) {
 }
 
 void SelectionDAGLowering::visitExtractElement(User &I) {
-  SDOperand InVec = getValue(I.getOperand(0));
-  SDOperand InIdx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(),
+  SDValue InVec = getValue(I.getOperand(0));
+  SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, TLI.getPointerTy(),
                                 getValue(I.getOperand(1)));
   setValue(&I, DAG.getNode(ISD::EXTRACT_VECTOR_ELT,
                            TLI.getValueType(I.getType()), InVec, InIdx));
 }
 
 void SelectionDAGLowering::visitShuffleVector(User &I) {
-  SDOperand V1   = getValue(I.getOperand(0));
-  SDOperand V2   = getValue(I.getOperand(1));
-  SDOperand Mask = getValue(I.getOperand(2));
+  SDValue V1   = getValue(I.getOperand(0));
+  SDValue V2   = getValue(I.getOperand(1));
+  SDValue Mask = getValue(I.getOperand(2));
 
   setValue(&I, DAG.getNode(ISD::VECTOR_SHUFFLE,
                            TLI.getValueType(I.getType()),
@@ -2712,23 +2712,23 @@ void SelectionDAGLowering::visitInsertValue(InsertValueInst &I) {
 
   unsigned NumAggValues = AggValueVTs.size();
   unsigned NumValValues = ValValueVTs.size();
-  SmallVector<SDOperand, 4> Values(NumAggValues);
+  SmallVector<SDValue, 4> Values(NumAggValues);
 
-  SDOperand Agg = getValue(Op0);
-  SDOperand Val = getValue(Op1);
+  SDValue Agg = getValue(Op0);
+  SDValue Val = getValue(Op1);
   unsigned i = 0;
   // Copy the beginning value(s) from the original aggregate.
   for (; i != LinearIndex; ++i)
     Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
-                SDOperand(Agg.Val, Agg.ResNo + i);
+                SDValue(Agg.Val, Agg.ResNo + i);
   // Copy values from the inserted value(s).
   for (; i != LinearIndex + NumValValues; ++i)
     Values[i] = FromUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
-                SDOperand(Val.Val, Val.ResNo + i - LinearIndex);
+                SDValue(Val.Val, Val.ResNo + i - LinearIndex);
   // Copy remaining value(s) from the original aggregate.
   for (; i != NumAggValues; ++i)
     Values[i] = IntoUndef ? DAG.getNode(ISD::UNDEF, AggValueVTs[i]) :
-                SDOperand(Agg.Val, Agg.ResNo + i);
+                SDValue(Agg.Val, Agg.ResNo + i);
 
   setValue(&I, DAG.getMergeValues(DAG.getVTList(&AggValueVTs[0], NumAggValues),
                                   &Values[0], NumAggValues));
@@ -2747,14 +2747,14 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
   ComputeValueVTs(TLI, ValTy, ValValueVTs);
 
   unsigned NumValValues = ValValueVTs.size();
-  SmallVector<SDOperand, 4> Values(NumValValues);
+  SmallVector<SDValue, 4> Values(NumValValues);
 
-  SDOperand Agg = getValue(Op0);
+  SDValue Agg = getValue(Op0);
   // Copy out the selected value(s).
   for (unsigned i = LinearIndex; i != LinearIndex + NumValValues; ++i)
     Values[i - LinearIndex] =
       OutOfUndef ? DAG.getNode(ISD::UNDEF, Agg.Val->getValueType(Agg.ResNo + i)) :
-                   SDOperand(Agg.Val, Agg.ResNo + i);
+                   SDValue(Agg.Val, Agg.ResNo + i);
 
   setValue(&I, DAG.getMergeValues(DAG.getVTList(&ValValueVTs[0], NumValValues),
                                   &Values[0], NumValValues));
@@ -2762,7 +2762,7 @@ void SelectionDAGLowering::visitExtractValue(ExtractValueInst &I) {
 
 
 void SelectionDAGLowering::visitGetElementPtr(User &I) {
-  SDOperand N = getValue(I.getOperand(0));
+  SDValue N = getValue(I.getOperand(0));
   const Type *Ty = I.getOperand(0)->getType();
 
   for (GetElementPtrInst::op_iterator OI = I.op_begin()+1, E = I.op_end();
@@ -2792,7 +2792,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) {
       
       // N = N + Idx * ElementSize;
       uint64_t ElementSize = TD->getABITypeSize(Ty);
-      SDOperand IdxN = getValue(Idx);
+      SDValue IdxN = getValue(Idx);
 
       // If the index is smaller or larger than intptr_t, truncate or extend
       // it.
@@ -2811,7 +2811,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) {
         continue;
       }
       
-      SDOperand Scale = DAG.getIntPtrConstant(ElementSize);
+      SDValue Scale = DAG.getIntPtrConstant(ElementSize);
       IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale);
       N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
     }
@@ -2831,7 +2831,7 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
     std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
              I.getAlignment());
 
-  SDOperand AllocSize = getValue(I.getArraySize());
+  SDValue AllocSize = getValue(I.getArraySize());
   MVT IntPtr = TLI.getPointerTy();
   if (IntPtr.bitsLT(AllocSize.getValueType()))
     AllocSize = DAG.getNode(ISD::TRUNCATE, IntPtr, AllocSize);
@@ -2857,10 +2857,10 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
   AllocSize = DAG.getNode(ISD::AND, AllocSize.getValueType(), AllocSize,
                           DAG.getIntPtrConstant(~(uint64_t)(StackAlign-1)));
 
-  SDOperand Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) };
+  SDValue Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) };
   const MVT *VTs = DAG.getNodeValueTypes(AllocSize.getValueType(),
                                                     MVT::Other);
-  SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, 2, Ops, 3);
+  SDValue DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, 2, Ops, 3);
   setValue(&I, DSA);
   DAG.setRoot(DSA.getValue(1));
 
@@ -2871,7 +2871,7 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
 
 void SelectionDAGLowering::visitLoad(LoadInst &I) {
   const Value *SV = I.getOperand(0);
-  SDOperand Ptr = getValue(SV);
+  SDValue Ptr = getValue(SV);
 
   const Type *Ty = I.getType();
   bool isVolatile = I.isVolatile();
@@ -2884,7 +2884,7 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
   if (NumValues == 0)
     return;
 
-  SDOperand Root;
+  SDValue Root;
   bool ConstantMemory = false;
   if (I.isVolatile())
     // Serialize volatile loads with other side effects.
@@ -2898,11 +2898,11 @@ void SelectionDAGLowering::visitLoad(