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| author | Dan Gohman <gohman@apple.com> | 2009-01-03 19:22:06 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-01-03 19:22:06 +0000 |
| commit | cc91d63ab7b3ee5c80497acf77f75ad9f76e985c (patch) | |
| tree | 7f61a6ff6237b6950e307cb8e0a867edb7fec717 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 1eb9268080498bc7b6d2d5df6fe8c13d6f939de0 (diff) | |
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 4fb50e30db..f1e43a9024 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3277,6 +3277,8 @@ SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) { if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) { // See if we can recursively simplify the LHS. unsigned Amt = RHSC->getZExtValue(); + // Watch out for shift count overflow though. + if (Amt >= Mask.getBitWidth()) break; APInt NewMask = Mask << Amt; SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask); if (SimplifyLHS.getNode()) { |