Rename SDOperand to SDValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 701 insertions, 701 deletions

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index e6c3314b24..747a0b1e54 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -70,7 +70,7 @@ namespace {
 
     /// visit - call the node-specific routine that knows how to fold each
     /// particular type of node.
-    SDOperand visit(SDNode *N);
+    SDValue visit(SDNode *N);
 
   public:
     /// AddToWorkList - Add to the work list making sure it's instance is at the
@@ -87,16 +87,16 @@ namespace {
                      WorkList.end());
     }
     
-    SDOperand CombineTo(SDNode *N, const SDOperand *To, unsigned NumTo,
+    SDValue CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
                         bool AddTo = true);
     
-    SDOperand CombineTo(SDNode *N, SDOperand Res, bool AddTo = true) {
+    SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true) {
       return CombineTo(N, &Res, 1, AddTo);
     }
     
-    SDOperand CombineTo(SDNode *N, SDOperand Res0, SDOperand Res1,
+    SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1,
                         bool AddTo = true) {
-      SDOperand To[] = { Res0, Res1 };
+      SDValue To[] = { Res0, Res1 };
       return CombineTo(N, To, 2, AddTo);
     }
     
@@ -105,12 +105,12 @@ namespace {
     /// SimplifyDemandedBits - Check the specified integer node value to see if
     /// it can be simplified or if things it uses can be simplified by bit
     /// propagation.  If so, return true.
-    bool SimplifyDemandedBits(SDOperand Op) {
+    bool SimplifyDemandedBits(SDValue Op) {
       APInt Demanded = APInt::getAllOnesValue(Op.getValueSizeInBits());
       return SimplifyDemandedBits(Op, Demanded);
     }
 
-    bool SimplifyDemandedBits(SDOperand Op, const APInt &Demanded);
+    bool SimplifyDemandedBits(SDValue Op, const APInt &Demanded);
 
     bool CombineToPreIndexedLoadStore(SDNode *N);
     bool CombineToPostIndexedLoadStore(SDNode *N);
@@ -119,122 +119,122 @@ namespace {
     /// combine - call the node-specific routine that knows how to fold each
     /// particular type of node. If that doesn't do anything, try the
     /// target-specific DAG combines.
-    SDOperand combine(SDNode *N);
+    SDValue combine(SDNode *N);
 
     // Visitation implementation - Implement dag node combining for different
     // node types.  The semantics are as follows:
     // Return Value:
-    //   SDOperand.Val == 0   - No change was made
-    //   SDOperand.Val == N   - N was replaced, is dead, and is already handled.
+    //   SDValue.Val == 0   - No change was made
+    //   SDValue.Val == N   - N was replaced, is dead, and is already handled.
     //   otherwise            - N should be replaced by the returned Operand.
     //
-    SDOperand visitTokenFactor(SDNode *N);
-    SDOperand visitMERGE_VALUES(SDNode *N);
-    SDOperand visitADD(SDNode *N);
-    SDOperand visitSUB(SDNode *N);
-    SDOperand visitADDC(SDNode *N);
-    SDOperand visitADDE(SDNode *N);
-    SDOperand visitMUL(SDNode *N);
-    SDOperand visitSDIV(SDNode *N);
-    SDOperand visitUDIV(SDNode *N);
-    SDOperand visitSREM(SDNode *N);
-    SDOperand visitUREM(SDNode *N);
-    SDOperand visitMULHU(SDNode *N);
-    SDOperand visitMULHS(SDNode *N);
-    SDOperand visitSMUL_LOHI(SDNode *N);
-    SDOperand visitUMUL_LOHI(SDNode *N);
-    SDOperand visitSDIVREM(SDNode *N);
-    SDOperand visitUDIVREM(SDNode *N);
-    SDOperand visitAND(SDNode *N);
-    SDOperand visitOR(SDNode *N);
-    SDOperand visitXOR(SDNode *N);
-    SDOperand SimplifyVBinOp(SDNode *N);
-    SDOperand visitSHL(SDNode *N);
-    SDOperand visitSRA(SDNode *N);
-    SDOperand visitSRL(SDNode *N);
-    SDOperand visitCTLZ(SDNode *N);
-    SDOperand visitCTTZ(SDNode *N);
-    SDOperand visitCTPOP(SDNode *N);
-    SDOperand visitSELECT(SDNode *N);
-    SDOperand visitSELECT_CC(SDNode *N);
-    SDOperand visitSETCC(SDNode *N);
-    SDOperand visitSIGN_EXTEND(SDNode *N);
-    SDOperand visitZERO_EXTEND(SDNode *N);
-    SDOperand visitANY_EXTEND(SDNode *N);
-    SDOperand visitSIGN_EXTEND_INREG(SDNode *N);
-    SDOperand visitTRUNCATE(SDNode *N);
-    SDOperand visitBIT_CONVERT(SDNode *N);
-    SDOperand visitBUILD_PAIR(SDNode *N);
-    SDOperand visitFADD(SDNode *N);
-    SDOperand visitFSUB(SDNode *N);
-    SDOperand visitFMUL(SDNode *N);
-    SDOperand visitFDIV(SDNode *N);
-    SDOperand visitFREM(SDNode *N);
-    SDOperand visitFCOPYSIGN(SDNode *N);
-    SDOperand visitSINT_TO_FP(SDNode *N);
-    SDOperand visitUINT_TO_FP(SDNode *N);
-    SDOperand visitFP_TO_SINT(SDNode *N);
-    SDOperand visitFP_TO_UINT(SDNode *N);
-    SDOperand visitFP_ROUND(SDNode *N);
-    SDOperand visitFP_ROUND_INREG(SDNode *N);
-    SDOperand visitFP_EXTEND(SDNode *N);
-    SDOperand visitFNEG(SDNode *N);
-    SDOperand visitFABS(SDNode *N);
-    SDOperand visitBRCOND(SDNode *N);
-    SDOperand visitBR_CC(SDNode *N);
-    SDOperand visitLOAD(SDNode *N);
-    SDOperand visitSTORE(SDNode *N);
-    SDOperand visitINSERT_VECTOR_ELT(SDNode *N);
-    SDOperand visitEXTRACT_VECTOR_ELT(SDNode *N);
-    SDOperand visitBUILD_VECTOR(SDNode *N);
-    SDOperand visitCONCAT_VECTORS(SDNode *N);
-    SDOperand visitVECTOR_SHUFFLE(SDNode *N);
-
-    SDOperand XformToShuffleWithZero(SDNode *N);
-    SDOperand ReassociateOps(unsigned Opc, SDOperand LHS, SDOperand RHS);
+    SDValue visitTokenFactor(SDNode *N);
+    SDValue visitMERGE_VALUES(SDNode *N);
+    SDValue visitADD(SDNode *N);
+    SDValue visitSUB(SDNode *N);
+    SDValue visitADDC(SDNode *N);
+    SDValue visitADDE(SDNode *N);
+    SDValue visitMUL(SDNode *N);
+    SDValue visitSDIV(SDNode *N);
+    SDValue visitUDIV(SDNode *N);
+    SDValue visitSREM(SDNode *N);
+    SDValue visitUREM(SDNode *N);
+    SDValue visitMULHU(SDNode *N);
+    SDValue visitMULHS(SDNode *N);
+    SDValue visitSMUL_LOHI(SDNode *N);
+    SDValue visitUMUL_LOHI(SDNode *N);
+    SDValue visitSDIVREM(SDNode *N);
+    SDValue visitUDIVREM(SDNode *N);
+    SDValue visitAND(SDNode *N);
+    SDValue visitOR(SDNode *N);
+    SDValue visitXOR(SDNode *N);
+    SDValue SimplifyVBinOp(SDNode *N);
+    SDValue visitSHL(SDNode *N);
+    SDValue visitSRA(SDNode *N);
+    SDValue visitSRL(SDNode *N);
+    SDValue visitCTLZ(SDNode *N);
+    SDValue visitCTTZ(SDNode *N);
+    SDValue visitCTPOP(SDNode *N);
+    SDValue visitSELECT(SDNode *N);
+    SDValue visitSELECT_CC(SDNode *N);
+    SDValue visitSETCC(SDNode *N);
+    SDValue visitSIGN_EXTEND(SDNode *N);
+    SDValue visitZERO_EXTEND(SDNode *N);
+    SDValue visitANY_EXTEND(SDNode *N);
+    SDValue visitSIGN_EXTEND_INREG(SDNode *N);
+    SDValue visitTRUNCATE(SDNode *N);
+    SDValue visitBIT_CONVERT(SDNode *N);
+    SDValue visitBUILD_PAIR(SDNode *N);
+    SDValue visitFADD(SDNode *N);
+    SDValue visitFSUB(SDNode *N);
+    SDValue visitFMUL(SDNode *N);
+    SDValue visitFDIV(SDNode *N);
+    SDValue visitFREM(SDNode *N);
+    SDValue visitFCOPYSIGN(SDNode *N);
+    SDValue visitSINT_TO_FP(SDNode *N);
+    SDValue visitUINT_TO_FP(SDNode *N);
+    SDValue visitFP_TO_SINT(SDNode *N);
+    SDValue visitFP_TO_UINT(SDNode *N);
+    SDValue visitFP_ROUND(SDNode *N);
+    SDValue visitFP_ROUND_INREG(SDNode *N);
+    SDValue visitFP_EXTEND(SDNode *N);
+    SDValue visitFNEG(SDNode *N);
+    SDValue visitFABS(SDNode *N);
+    SDValue visitBRCOND(SDNode *N);
+    SDValue visitBR_CC(SDNode *N);
+    SDValue visitLOAD(SDNode *N);
+    SDValue visitSTORE(SDNode *N);
+    SDValue visitINSERT_VECTOR_ELT(SDNode *N);
+    SDValue visitEXTRACT_VECTOR_ELT(SDNode *N);
+    SDValue visitBUILD_VECTOR(SDNode *N);
+    SDValue visitCONCAT_VECTORS(SDNode *N);
+    SDValue visitVECTOR_SHUFFLE(SDNode *N);
+
+    SDValue XformToShuffleWithZero(SDNode *N);
+    SDValue ReassociateOps(unsigned Opc, SDValue LHS, SDValue RHS);
     
-    SDOperand visitShiftByConstant(SDNode *N, unsigned Amt);
+    SDValue visitShiftByConstant(SDNode *N, unsigned Amt);
 
-    bool SimplifySelectOps(SDNode *SELECT, SDOperand LHS, SDOperand RHS);
-    SDOperand SimplifyBinOpWithSameOpcodeHands(SDNode *N);
-    SDOperand SimplifySelect(SDOperand N0, SDOperand N1, SDOperand N2);
-    SDOperand SimplifySelectCC(SDOperand N0, SDOperand N1, SDOperand N2, 
-                               SDOperand N3, ISD::CondCode CC, 
+    bool SimplifySelectOps(SDNode *SELECT, SDValue LHS, SDValue RHS);
+    SDValue SimplifyBinOpWithSameOpcodeHands(SDNode *N);
+    SDValue SimplifySelect(SDValue N0, SDValue N1, SDValue N2);
+    SDValue SimplifySelectCC(SDValue N0, SDValue N1, SDValue N2, 
+                               SDValue N3, ISD::CondCode CC, 
                                bool NotExtCompare = false);
-    SDOperand SimplifySetCC(MVT VT, SDOperand N0, SDOperand N1,
+    SDValue SimplifySetCC(MVT VT, SDValue N0, SDValue N1,
                             ISD::CondCode Cond, bool foldBooleans = true);
-    SDOperand SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, 
+    SDValue SimplifyNodeWithTwoResults(SDNode *N, unsigned LoOp, 
                                          unsigned HiOp);
-    SDOperand CombineConsecutiveLoads(SDNode *N, MVT VT);
-    SDOperand ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *, MVT);
-    SDOperand BuildSDIV(SDNode *N);
-    SDOperand BuildUDIV(SDNode *N);
-    SDNode *MatchRotate(SDOperand LHS, SDOperand RHS);
-    SDOperand ReduceLoadWidth(SDNode *N);
+    SDValue CombineConsecutiveLoads(SDNode *N, MVT VT);
+    SDValue ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *, MVT);
+    SDValue BuildSDIV(SDNode *N);
+    SDValue BuildUDIV(SDNode *N);
+    SDNode *MatchRotate(SDValue LHS, SDValue RHS);
+    SDValue ReduceLoadWidth(SDNode *N);
     
-    SDOperand GetDemandedBits(SDOperand V, const APInt &Mask);
+    SDValue GetDemandedBits(SDValue V, const APInt &Mask);
     
     /// GatherAllAliases - Walk up chain skipping non-aliasing memory nodes,
     /// looking for aliasing nodes and adding them to the Aliases vector.
-    void GatherAllAliases(SDNode *N, SDOperand OriginalChain,
-                          SmallVector<SDOperand, 8> &Aliases);
+    void GatherAllAliases(SDNode *N, SDValue OriginalChain,
+                          SmallVector<SDValue, 8> &Aliases);
 
     /// isAlias - Return true if there is any possibility that the two addresses
     /// overlap.
-    bool isAlias(SDOperand Ptr1, int64_t Size1,
+    bool isAlias(SDValue Ptr1, int64_t Size1,
                  const Value *SrcValue1, int SrcValueOffset1,
-                 SDOperand Ptr2, int64_t Size2,
+                 SDValue Ptr2, int64_t Size2,
                  const Value *SrcValue2, int SrcValueOffset2);
                  
     /// FindAliasInfo - Extracts the relevant alias information from the memory
     /// node.  Returns true if the operand was a load.
     bool FindAliasInfo(SDNode *N,
-                       SDOperand &Ptr, int64_t &Size,
+                       SDValue &Ptr, int64_t &Size,
                        const Value *&SrcValue, int &SrcValueOffset);
                        
     /// FindBetterChain - Walk up chain skipping non-aliasing memory nodes,
     /// looking for a better chain (aliasing node.)
-    SDOperand FindBetterChain(SDNode *N, SDOperand Chain);
+    SDValue FindBetterChain(SDNode *N, SDValue Chain);
     
 public:
     DAGCombiner(SelectionDAG &D, AliasAnalysis &A)
@@ -276,19 +276,19 @@ void TargetLowering::DAGCombinerInfo::AddToWorklist(SDNode *N) {
   ((DAGCombiner*)DC)->AddToWorkList(N);
 }
 
-SDOperand TargetLowering::DAGCombinerInfo::
-CombineTo(SDNode *N, const std::vector<SDOperand> &To) {
+SDValue TargetLowering::DAGCombinerInfo::
+CombineTo(SDNode *N, const std::vector<SDValue> &To) {
   return ((DAGCombiner*)DC)->CombineTo(N, &To[0], To.size());
 }
 
-SDOperand TargetLowering::DAGCombinerInfo::
-CombineTo(SDNode *N, SDOperand Res) {
+SDValue TargetLowering::DAGCombinerInfo::
+CombineTo(SDNode *N, SDValue Res) {
   return ((DAGCombiner*)DC)->CombineTo(N, Res);
 }
 
 
-SDOperand TargetLowering::DAGCombinerInfo::
-CombineTo(SDNode *N, SDOperand Res0, SDOperand Res1) {
+SDValue TargetLowering::DAGCombinerInfo::
+CombineTo(SDNode *N, SDValue Res0, SDValue Res1) {
   return ((DAGCombiner*)DC)->CombineTo(N, Res0, Res1);
 }
 
@@ -300,7 +300,7 @@ CombineTo(SDNode *N, SDOperand Res0, SDOperand Res1) {
 /// isNegatibleForFree - Return 1 if we can compute the negated form of the
 /// specified expression for the same cost as the expression itself, or 2 if we
 /// can compute the negated form more cheaply than the expression itself.
-static char isNegatibleForFree(SDOperand Op, bool AfterLegalize,
+static char isNegatibleForFree(SDValue Op, bool AfterLegalize,
                                unsigned Depth = 0) {
   // No compile time optimizations on this type.
   if (Op.getValueType() == MVT::ppcf128)
@@ -356,7 +356,7 @@ static char isNegatibleForFree(SDOperand Op, bool AfterLegalize,
 
 /// GetNegatedExpression - If isNegatibleForFree returns true, this function
 /// returns the newly negated expression.
-static SDOperand GetNegatedExpression(SDOperand Op, SelectionDAG &DAG,
+static SDValue GetNegatedExpression(SDValue Op, SelectionDAG &DAG,
                                       bool AfterLegalize, unsigned Depth = 0) {
   // fneg is removable even if it has multiple uses.
   if (Op.getOpcode() == ISD::FNEG) return Op.getOperand(0);
@@ -436,8 +436,8 @@ static SDOperand GetNegatedExpression(SDOperand Op, SelectionDAG &DAG,
 // Also, set the incoming LHS, RHS, and CC references to the appropriate 
 // nodes based on the type of node we are checking.  This simplifies life a
 // bit for the callers.
-static bool isSetCCEquivalent(SDOperand N, SDOperand &LHS, SDOperand &RHS,
-                              SDOperand &CC) {
+static bool isSetCCEquivalent(SDValue N, SDValue &LHS, SDValue &RHS,
+                              SDValue &CC) {
   if (N.getOpcode() == ISD::SETCC) {
     LHS = N.getOperand(0);
     RHS = N.getOperand(1);
@@ -460,24 +460,24 @@ static bool isSetCCEquivalent(SDOperand N, SDOperand &LHS, SDOperand &RHS,
 // isOneUseSetCC - Return true if this is a SetCC-equivalent operation with only
 // one use.  If this is true, it allows the users to invert the operation for
 // free when it is profitable to do so.
-static bool isOneUseSetCC(SDOperand N) {
-  SDOperand N0, N1, N2;
+static bool isOneUseSetCC(SDValue N) {
+  SDValue N0, N1, N2;
   if (isSetCCEquivalent(N, N0, N1, N2) && N.Val->hasOneUse())
     return true;
   return false;
 }
 
-SDOperand DAGCombiner::ReassociateOps(unsigned Opc, SDOperand N0, SDOperand N1){
+SDValue DAGCombiner::ReassociateOps(unsigned Opc, SDValue N0, SDValue N1){
   MVT VT = N0.getValueType();
   // reassoc. (op (op x, c1), y) -> (op (op x, y), c1) iff x+c1 has one use
   // reassoc. (op (op x, c1), c2) -> (op x, (op c1, c2))
   if (N0.getOpcode() == Opc && isa<ConstantSDNode>(N0.getOperand(1))) {
     if (isa<ConstantSDNode>(N1)) {
-      SDOperand OpNode = DAG.getNode(Opc, VT, N0.getOperand(1), N1);
+      SDValue OpNode = DAG.getNode(Opc, VT, N0.getOperand(1), N1);
       AddToWorkList(OpNode.Val);
       return DAG.getNode(Opc, VT, OpNode, N0.getOperand(0));
     } else if (N0.hasOneUse()) {
-      SDOperand OpNode = DAG.getNode(Opc, VT, N0.getOperand(0), N1);
+      SDValue OpNode = DAG.getNode(Opc, VT, N0.getOperand(0), N1);
       AddToWorkList(OpNode.Val);
       return DAG.getNode(Opc, VT, OpNode, N0.getOperand(1));
     }
@@ -486,20 +486,20 @@ SDOperand DAGCombiner::ReassociateOps(unsigned Opc, SDOperand N0, SDOperand N1){
   // reassoc. (op c2, (op x, c1)) -> (op x, (op c1, c2))
   if (N1.getOpcode() == Opc && isa<ConstantSDNode>(N1.getOperand(1))) {
     if (isa<ConstantSDNode>(N0)) {
-      SDOperand OpNode = DAG.getNode(Opc, VT, N1.getOperand(1), N0);
+      SDValue OpNode = DAG.getNode(Opc, VT, N1.getOperand(1), N0);
       AddToWorkList(OpNode.Val);
       return DAG.getNode(Opc, VT, OpNode, N1.getOperand(0));
     } else if (N1.hasOneUse()) {
-      SDOperand OpNode = DAG.getNode(Opc, VT, N1.getOperand(0), N0);
+      SDValue OpNode = DAG.getNode(Opc, VT, N1.getOperand(0), N0);
       AddToWorkList(OpNode.Val);
       return DAG.getNode(Opc, VT, OpNode, N1.getOperand(1));
     }
   }
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::CombineTo(SDNode *N, const SDOperand *To, unsigned NumTo,
-                                 bool AddTo) {
+SDValue DAGCombiner::CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
+                               bool AddTo) {
   assert(N->getNumValues() == NumTo && "Broken CombineTo call!");
   ++NodesCombined;
   DOUT << "\nReplacing.1 "; DEBUG(N->dump(&DAG));
@@ -522,13 +522,13 @@ SDOperand DAGCombiner::CombineTo(SDNode *N, const SDOperand *To, unsigned NumTo,
   
   // Finally, since the node is now dead, remove it from the graph.
   DAG.DeleteNode(N);
-  return SDOperand(N, 0);
+  return SDValue(N, 0);
 }
 
 /// SimplifyDemandedBits - Check the specified integer node value to see if
 /// it can be simplified or if things it uses can be simplified by bit
 /// propagation.  If so, return true.
-bool DAGCombiner::SimplifyDemandedBits(SDOperand Op, const APInt &Demanded) {
+bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &Demanded) {
   TargetLowering::TargetLoweringOpt TLO(DAG, AfterLegalize);
   APInt KnownZero, KnownOne;
   if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO))
@@ -590,7 +590,7 @@ void DAGCombiner::Run(bool RunningAfterLegalize) {
   
   // The root of the dag may dangle to deleted nodes until the dag combiner is
   // done.  Set it to null to avoid confusion.
-  DAG.setRoot(SDOperand());
+  DAG.setRoot(SDValue());
   
   // while the worklist isn't empty, inspect the node on the end of it and
   // try and combine it.
@@ -609,7 +609,7 @@ void DAGCombiner::Run(bool RunningAfterLegalize) {
       continue;
     }
     
-    SDOperand RV = combine(N);
+    SDValue RV = combine(N);
     
     if (RV.Val == 0)
       continue;
@@ -636,7 +636,7 @@ void DAGCombiner::Run(bool RunningAfterLegalize) {
     else {
       assert(N->getValueType(0) == RV.getValueType() &&
              N->getNumValues() == 1 && "Type mismatch");
-      SDOperand OpV = RV;
+      SDValue OpV = RV;
       DAG.ReplaceAllUsesWith(N, &OpV, &DeadNodes);
     }
       
@@ -662,7 +662,7 @@ void DAGCombiner::Run(bool RunningAfterLegalize) {
   DAG.setRoot(Dummy.getValue());
 }
 
-SDOperand DAGCombiner::visit(SDNode *N) {
+SDValue DAGCombiner::visit(SDNode *N) {
   switch(N->getOpcode()) {
   default: break;
   case ISD::TokenFactor:        return visitTokenFactor(N);
@@ -726,12 +726,12 @@ SDOperand DAGCombiner::visit(SDNode *N) {
   case ISD::CONCAT_VECTORS:     return visitCONCAT_VECTORS(N);
   case ISD::VECTOR_SHUFFLE:     return visitVECTOR_SHUFFLE(N);
   }
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::combine(SDNode *N) {
+SDValue DAGCombiner::combine(SDNode *N) {
 
-  SDOperand RV = visit(N);
+  SDValue RV = visit(N);
 
   // If nothing happened, try a target-specific DAG combine.
   if (RV.Val == 0) {
@@ -754,15 +754,15 @@ SDOperand DAGCombiner::combine(SDNode *N) {
   if (RV.Val == 0 && 
       SelectionDAG::isCommutativeBinOp(N->getOpcode()) &&
       N->getNumValues() == 1) {
-    SDOperand N0 = N->getOperand(0);
-    SDOperand N1 = N->getOperand(1);
+    SDValue N0 = N->getOperand(0);
+    SDValue N1 = N->getOperand(1);
     // Constant operands are canonicalized to RHS.
     if (isa<ConstantSDNode>(N0) || !isa<ConstantSDNode>(N1)) {
-      SDOperand Ops[] = { N1, N0 };
+      SDValue Ops[] = { N1, N0 };
       SDNode *CSENode = DAG.getNodeIfExists(N->getOpcode(), N->getVTList(),
                                             Ops, 2);
       if (CSENode)
-        return SDOperand(CSENode, 0);
+        return SDValue(CSENode, 0);
     }
   }
 
@@ -771,7 +771,7 @@ SDOperand DAGCombiner::combine(SDNode *N) {
 
 /// getInputChainForNode - Given a node, return its input chain if it has one,
 /// otherwise return a null sd operand.
-static SDOperand getInputChainForNode(SDNode *N) {
+static SDValue getInputChainForNode(SDNode *N) {
   if (unsigned NumOps = N->getNumOperands()) {
     if (N->getOperand(0).getValueType() == MVT::Other)
       return N->getOperand(0);
@@ -781,10 +781,10 @@ static SDOperand getInputChainForNode(SDNode *N) {
       if (N->getOperand(i).getValueType() == MVT::Other)
         return N->getOperand(i);
   }
-  return SDOperand(0, 0);
+  return SDValue(0, 0);
 }
 
-SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
+SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
   // If N has two operands, where one has an input chain equal to the other,
   // the 'other' chain is redundant.
   if (N->getNumOperands() == 2) {
@@ -795,7 +795,7 @@ SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
   }
   
   SmallVector<SDNode *, 8> TFs;     // List of token factors to visit.
-  SmallVector<SDOperand, 8> Ops;    // Ops for replacing token factor.
+  SmallVector<SDValue, 8> Ops;    // Ops for replacing token factor.
   SmallPtrSet<SDNode*, 16> SeenOps; 
   bool Changed = false;             // If we should replace this token factor.
   
@@ -809,7 +809,7 @@ SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
     
     // Check each of the operands.
     for (unsigned i = 0, ie = TF->getNumOperands(); i != ie; ++i) {
-      SDOperand Op = TF->getOperand(i);
+      SDValue Op = TF->getOperand(i);
       
       switch (Op.getOpcode()) {
       case ISD::EntryToken:
@@ -841,7 +841,7 @@ SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
     }
   }
 
-  SDOperand Result;
+  SDValue Result;
 
   // If we've change things around then replace token factor.
   if (Changed) {
@@ -861,22 +861,22 @@ SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
 }
 
 /// MERGE_VALUES can always be eliminated.
-SDOperand DAGCombiner::visitMERGE_VALUES(SDNode *N) {
+SDValue DAGCombiner::visitMERGE_VALUES(SDNode *N) {
   WorkListRemover DeadNodes(*this);
   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
-    DAG.ReplaceAllUsesOfValueWith(SDOperand(N, i), N->getOperand(i),
+    DAG.ReplaceAllUsesOfValueWith(SDValue(N, i), N->getOperand(i),
                                   &DeadNodes);
   removeFromWorkList(N);
   DAG.DeleteNode(N);
-  return SDOperand(N, 0);   // Return N so it doesn't get rechecked!
+  return SDValue(N, 0);   // Return N so it doesn't get rechecked!
 }
 
 
 static
-SDOperand combineShlAddConstant(SDOperand N0, SDOperand N1, SelectionDAG &DAG) {
+SDValue combineShlAddConstant(SDValue N0, SDValue N1, SelectionDAG &DAG) {
   MVT VT = N0.getValueType();
-  SDOperand N00 = N0.getOperand(0);
-  SDOperand N01 = N0.getOperand(1);
+  SDValue N00 = N0.getOperand(0);
+  SDValue N01 = N0.getOperand(1);
   ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N01);
   if (N01C && N00.getOpcode() == ISD::ADD && N00.Val->hasOneUse() &&
       isa<ConstantSDNode>(N00.getOperand(1))) {
@@ -885,22 +885,22 @@ SDOperand combineShlAddConstant(SDOperand N0, SDOperand N1, SelectionDAG &DAG) {
                      DAG.getNode(ISD::SHL, VT, N00.getOperand(1), N01));
     return DAG.getNode(ISD::ADD, VT, N0, N1);
   }
-  return SDOperand();
+  return SDValue();
 }
 
 static
-SDOperand combineSelectAndUse(SDNode *N, SDOperand Slct, SDOperand OtherOp,
-                              SelectionDAG &DAG) {
+SDValue combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp,
+                            SelectionDAG &DAG) {
   MVT VT = N->getValueType(0);
   unsigned Opc = N->getOpcode();
   bool isSlctCC = Slct.getOpcode() == ISD::SELECT_CC;
-  SDOperand LHS = isSlctCC ? Slct.getOperand(2) : Slct.getOperand(1);
-  SDOperand RHS = isSlctCC ? Slct.getOperand(3) : Slct.getOperand(2);
+  SDValue LHS = isSlctCC ? Slct.getOperand(2) : Slct.getOperand(1);
+  SDValue RHS = isSlctCC ? Slct.getOperand(3) : Slct.getOperand(2);
   ISD::CondCode CC = ISD::SETCC_INVALID;
   if (isSlctCC)
     CC = cast<CondCodeSDNode>(Slct.getOperand(4))->get();
   else {
-    SDOperand CCOp = Slct.getOperand(0);
+    SDValue CCOp = Slct.getOperand(0);
     if (CCOp.getOpcode() == ISD::SETCC)
       CC = cast<CondCodeSDNode>(CCOp.getOperand(2))->get();
   }
@@ -916,7 +916,7 @@ SDOperand combineSelectAndUse(SDNode *N, SDOperand Slct, SDOperand OtherOp,
            RHS.getOpcode() == ISD::Constant &&
            cast<ConstantSDNode>(RHS)->isNullValue()) {
     std::swap(LHS, RHS);
-    SDOperand Op0 = Slct.getOperand(0);
+    SDValue Op0 = Slct.getOperand(0);
     bool isInt = (isSlctCC ? Op0.getValueType() :
                   Op0.getOperand(0).getValueType()).isInteger();
     CC = ISD::getSetCCInverse(CC, isInt);
@@ -925,29 +925,29 @@ SDOperand combineSelectAndUse(SDNode *N, SDOperand Slct, SDOperand OtherOp,
   }
 
   if (DoXform) {
-    SDOperand Result = DAG.getNode(Opc, VT, OtherOp, RHS);
+    SDValue Result = DAG.getNode(Opc, VT, OtherOp, RHS);
     if (isSlctCC)
       return DAG.getSelectCC(OtherOp, Result,
                              Slct.getOperand(0), Slct.getOperand(1), CC);
-    SDOperand CCOp = Slct.getOperand(0);
+    SDValue CCOp = Slct.getOperand(0);
     if (InvCC)
       CCOp = DAG.getSetCC(CCOp.getValueType(), CCOp.getOperand(0),
                           CCOp.getOperand(1), CC);
     return DAG.getNode(ISD::SELECT, VT, CCOp, OtherOp, Result);
   }
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::visitADD(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
+SDValue DAGCombiner::visitADD(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N0.getValueType();
 
   // fold vector ops
   if (VT.isVector()) {
-    SDOperand FoldedVOp = SimplifyVBinOp(N);
+    SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.Val) return FoldedVOp;
   }
   
@@ -973,7 +973,7 @@ SDOperand DAGCombiner::visitADD(SDNode *N) {
                                          N0C->getAPIntValue(), VT),
                          N0.getOperand(1));
   // reassociate add
-  SDOperand RADD = ReassociateOps(ISD::ADD, N0, N1);
+  SDValue RADD = ReassociateOps(ISD::ADD, N0, N1);
   if (RADD.Val != 0)
     return RADD;
   // fold ((0-A) + B) -> B-A
@@ -988,8 +988,8 @@ SDOperand DAGCombiner::visitADD(SDNode *N) {
   if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
     return N1.getOperand(0);
 
-  if (!VT.isVector() && SimplifyDemandedBits(SDOperand(N, 0)))
-    return SDOperand(N, 0);
+  if (!VT.isVector() && SimplifyDemandedBits(SDValue(N, 0)))
+    return SDValue(N, 0);
   
   // fold (a+b) -> (a|b) iff a and b share no bits.
   if (VT.isInteger() && !VT.isVector()) {
@@ -1010,30 +1010,30 @@ SDOperand DAGCombiner::visitADD(SDNode *N) {
 
   // fold (add (shl (add x, c1), c2), ) -> (add (add (shl x, c2), c1<<c2), )
   if (N0.getOpcode() == ISD::SHL && N0.Val->hasOneUse()) {
-    SDOperand Result = combineShlAddConstant(N0, N1, DAG);
+    SDValue Result = combineShlAddConstant(N0, N1, DAG);
     if (Result.Val) return Result;
   }
   if (N1.getOpcode() == ISD::SHL && N1.Val->hasOneUse()) {
-    SDOperand Result = combineShlAddConstant(N1, N0, DAG);
+    SDValue Result = combineShlAddConstant(N1, N0, DAG);
     if (Result.Val) return Result;
   }
 
   // fold (add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
   if (N0.getOpcode() == ISD::SELECT && N0.Val->hasOneUse()) {
-    SDOperand Result = combineSelectAndUse(N, N0, N1, DAG);
+    SDValue Result = combineSelectAndUse(N, N0, N1, DAG);
     if (Result.Val) return Result;
   }
   if (N1.getOpcode() == ISD::SELECT && N1.Val->hasOneUse()) {
-    SDOperand Result = combineSelectAndUse(N, N1, N0, DAG);
+    SDValue Result = combineSelectAndUse(N, N1, N0, DAG);
     if (Result.Val) return Result;
   }
 
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::visitADDC(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
+SDValue DAGCombiner::visitADDC(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N0.getValueType();
@@ -1067,13 +1067,13 @@ SDOperand DAGCombiner::visitADDC(SDNode *N) {
                        DAG.getNode(ISD::CARRY_FALSE, MVT::Flag));
   }
   
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::visitADDE(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
-  SDOperand CarryIn = N->getOperand(2);
+SDValue DAGCombiner::visitADDE(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
+  SDValue CarryIn = N->getOperand(2);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   //MVT VT = N0.getValueType();
@@ -1086,21 +1086,21 @@ SDOperand DAGCombiner::visitADDE(SDNode *N) {
   if (CarryIn.getOpcode() == ISD::CARRY_FALSE)
     return DAG.getNode(ISD::ADDC, N->getVTList(), N1, N0);
   
-  return SDOperand();
+  return SDValue();
 }
 
 
 
-SDOperand DAGCombiner::visitSUB(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
+SDValue DAGCombiner::visitSUB(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
   MVT VT = N0.getValueType();
   
   // fold vector ops
   if (VT.isVector()) {
-    SDOperand FoldedVOp = SimplifyVBinOp(N);
+    SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.Val) return FoldedVOp;
   }
   
@@ -1122,7 +1122,7 @@ SDOperand DAGCombiner::visitSUB(SDNode *N) {
     return N0.getOperand(0);
   // fold (sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))
   if (N1.getOpcode() == ISD::SELECT && N1.Val->hasOneUse()) {
-    SDOperand Result = combineSelectAndUse(N, N1, N0, DAG);
+    SDValue Result = combineSelectAndUse(N, N1, N0, DAG);
     if (Result.Val) return Result;
   }
   // If either operand of a sub is undef, the result is undef
@@ -1131,19 +1131,19 @@ SDOperand DAGCombiner::visitSUB(SDNode *N) {
   if (N1.getOpcode() == ISD::UNDEF)
     return N1;
 
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::visitMUL(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
+SDValue DAGCombiner::visitMUL(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
   MVT VT = N0.getValueType();
   
   // fold vector ops
   if (VT.isVector()) {
-    SDOperand FoldedVOp = SimplifyVBinOp(N);
+    SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.Val) return FoldedVOp;
   }
   
@@ -1180,7 +1180,7 @@ SDOperand DAGCombiner::visitMUL(SDNode *N) {
   // (mul (shl X, c1), c2) -> (mul X, c2 << c1)
   if (N1C && N0.getOpcode() == ISD::SHL && 
       isa<ConstantSDNode>(N0.getOperand(1))) {
-    SDOperand C3 = DAG.getNode(ISD::SHL, VT, N1, N0.getOperand(1));
+    SDValue C3 = DAG.getNode(ISD::SHL, VT, N1, N0.getOperand(1));
     AddToWorkList(C3.Val);
     return DAG.getNode(ISD::MUL, VT, N0.getOperand(0), C3);
   }
@@ -1188,7 +1188,7 @@ SDOperand DAGCombiner::visitMUL(SDNode *N) {
   // Change (mul (shl X, C), Y) -> (shl (mul X, Y), C) when the shift has one
   // use.
   {
-    SDOperand Sh(0,0), Y(0,0);
+    SDValue Sh(0,0), Y(0,0);
     // Check for both (mul (shl X, C), Y)  and  (mul Y, (shl X, C)).
     if (N0.getOpcode() == ISD::SHL && isa<ConstantSDNode>(N0.getOperand(1)) &&
         N0.Val->hasOneUse()) {
@@ -1198,7 +1198,7 @@ SDOperand DAGCombiner::visitMUL(SDNode *N) {
       Sh = N1; Y = N0;
     }
     if (Sh.Val) {
-      SDOperand Mul = DAG.getNode(ISD::MUL, VT, Sh.getOperand(0), Y);
+      SDValue Mul = DAG.getNode(ISD::MUL, VT, Sh.getOperand(0), Y);
       return DAG.getNode(ISD::SHL, VT, Mul, Sh.getOperand(1));
     }
   }
@@ -1211,23 +1211,23 @@ SDOperand DAGCombiner::visitMUL(SDNode *N) {
   }
   
   // reassociate mul
-  SDOperand RMUL = ReassociateOps(ISD::MUL, N0, N1);
+  SDValue RMUL = ReassociateOps(ISD::MUL, N0, N1);
   if (RMUL.Val != 0)
     return RMUL;
 
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::visitSDIV(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
+SDValue DAGCombiner::visitSDIV(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
   MVT VT = N->getValueType(0);
 
   // fold vector ops
   if (VT.isVector()) {
-    SDOperand FoldedVOp = SimplifyVBinOp(N);
+    SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.Val) return FoldedVOp;
   }
   
@@ -1253,23 +1253,23 @@ SDOperand DAGCombiner::visitSDIV(SDNode *N) {
     // If dividing by powers of two is cheap, then don't perform the following
     // fold.
     if (TLI.isPow2DivCheap())
-      return SDOperand();
+      return SDValue();
     int64_t pow2 = N1C->getSignExtended();
     int64_t abs2 = pow2 > 0 ? pow2 : -pow2;
     unsigned lg2 = Log2_64(abs2);
     // Splat the sign bit into the register
-    SDOperand SGN = DAG.getNode(ISD::SRA, VT, N0,
+    SDValue SGN = DAG.getNode(ISD::SRA, VT, N0,
                                 DAG.getConstant(VT.getSizeInBits()-1,
                                                 TLI.getShiftAmountTy()));
     AddToWorkList(SGN.Val);
     // Add (N0 < 0) ? abs2 - 1 : 0;
-    SDOperand SRL = DAG.getNode(ISD::SRL, VT, SGN,
+    SDValue SRL = DAG.getNode(ISD::SRL, VT, SGN,
                                 DAG.getConstant(VT.getSizeInBits()-lg2,
                                                 TLI.getShiftAmountTy()));
-    SDOperand ADD = DAG.getNode(ISD::ADD, VT, N0, SRL);
+    SDValue ADD = DAG.getNode(ISD::ADD, VT, N0, SRL);
     AddToWorkList(SRL.Val);
     AddToWorkList(ADD.Val);    // Divide by pow2
-    SDOperand SRA = DAG.getNode(ISD::SRA, VT, ADD,
+    SDValue SRA = DAG.getNode(ISD::SRA, VT, ADD,
                                 DAG.getConstant(lg2, TLI.getShiftAmountTy()));
     // If we're dividing by a positive value, we're done.  Otherwise, we must
     // negate the result.
@@ -1282,7 +1282,7 @@ SDOperand DAGCombiner::visitSDIV(SDNode *N) {
   // alternate sequence.
   if (N1C && (N1C->getSignExtended() < -1 || N1C->getSignExtended() > 1) && 
       !TLI.isIntDivCheap()) {
-    SDOperand Op = BuildSDIV(N);
+    SDValue Op = BuildSDIV(N);
     if (Op.Val) return Op;
   }
 
@@ -1293,19 +1293,19 @@ SDOperand DAGCombiner::visitSDIV(SDNode *N) {
   if (N1.getOpcode() == ISD::UNDEF)
     return N1;
 
-  return SDOperand();
+  return SDValue();
 }
 
-SDOperand DAGCombiner::visitUDIV(SDNode *N) {
-  SDOperand N0 = N->getOperand(0);
-  SDOperand N1 = N->getOperand(1);
+SDValue DAGCombiner::visitUDIV(SDNode *N) {
+  SDValue N0 = N->getOperand(0);
+  SDValue N1 = N->getOperand(1);
   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
   MVT VT = N->getValueType(0);
   
   // fold vector ops
   if (VT.isVector()) {
-    SDOperand FoldedVOp = SimplifyVBinOp(N);
+    SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.Val) return FoldedVOp;
   }
   
@@ -1322,7 +1322,7 @@ SDOperand DAGCombiner::visitUDIV(SDNode *N) {
     if (ConstantSDNode *SHC = dyn_cast<ConstantSDNode>(N1.getOperand(0))) {
       if (SHC->getAPIntValue().isPowerOf2()) {
         MVT ADDVT = N1.getOperand(1).getValueType();
-        SDOperand Add = DAG.getNode(ISD::ADD, ADDVT, N1.getOperand(1),
+        SDValue Add = DAG.getNode(ISD::ADD, ADDVT, N1.getOperand(1),
                                     DAG.getConstant(SHC->getAPIntValue()
                                                                     .logBase2(),
                                                     ADDVT));
@@ -1333,7 +1333,7 @@ SDOperand DAGCombiner::visitUDIV(SDNode *N) {
   }
   // fold (udiv x, c) -> alternate
   if (N1C && !N1C->isNullValue() && !TLI.isIntDivCheap()) {
-    SDOperand Op = BuildUDIV(N);
+    SDValue Op = BuildUDIV(N);
     if (Op.Val) return Op;
   }
 
@@ -1344,12 +1344,12 @@ SDOperand DAGCombiner::visitUDIV(SDNode *N) {
   if (N1.getOpcode() == ISD::UNDEF)