diff options
| author | Dan Gohman <gohman@apple.com> | 2009-07-24 00:30:09 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-07-24 00:30:09 +0000 |
| commit | d2cb3d2c32b8f53bf94d56fbdd48503ace28df4b (patch) | |
| tree | 600f87219916311734656684a616d2be9fcda3b9 /docs/CodeGenerator.html | |
| parent | 5ff58b5c3ab6df332600678798ea5c69c5e943d3 (diff) | |
Remove the IA-64 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76920 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/CodeGenerator.html')
| -rw-r--r-- | docs/CodeGenerator.html | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index cf228265c9..2f716a2161 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -1380,9 +1380,9 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf, for <tt>RegisterClass</tt>, the last parameter of which is a list of registers. Just commenting some out is one simple way to avoid them being used. A more polite way is to explicitly exclude some registers from - the <i>allocation order</i>. See the definition of the <tt>GR</tt> register - class in <tt>lib/Target/IA64/IA64RegisterInfo.td</tt> for an example of this - (e.g., <tt>numReservedRegs</tt> registers are hidden.)</p> + the <i>allocation order</i>. See the definition of the <tt>GR8</tt> register + class in <tt>lib/Target/X86/X86RegisterInfo.td</tt> for an example of this. + </p> <p>Virtual registers are also denoted by integer numbers. Contrary to physical registers, different virtual registers never share the same number. The |