From d2cb3d2c32b8f53bf94d56fbdd48503ace28df4b Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 24 Jul 2009 00:30:09 +0000 Subject: Remove the IA-64 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76920 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/CodeGenerator.html | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'docs/CodeGenerator.html') diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index cf228265c9..2f716a2161 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -1380,9 +1380,9 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf, for RegisterClass, the last parameter of which is a list of registers. Just commenting some out is one simple way to avoid them being used. A more polite way is to explicitly exclude some registers from - the allocation order. See the definition of the GR register - class in lib/Target/IA64/IA64RegisterInfo.td for an example of this - (e.g., numReservedRegs registers are hidden.)

+ the allocation order. See the definition of the GR8 register + class in lib/Target/X86/X86RegisterInfo.td for an example of this. +

Virtual registers are also denoted by integer numbers. Contrary to physical registers, different virtual registers never share the same number. The -- cgit v1.2.3-18-g5258