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| author | Chris Lattner <sabre@nondot.org> | 2006-04-03 23:58:04 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-04-03 23:58:04 +0000 |
| commit | b68314480d693f2d431c9d1748f4c8c084f3e5f5 (patch) | |
| tree | 833fc7c0e6c52189610431a1c5e4417695bbe25a | |
| parent | 01cae0799dd4a43c02edc3b5e08e9010ac4ae459 (diff) | |
Revert accidentally committed hunks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27386 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 1a930dcd64..1c3f4fdcef 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -182,7 +182,7 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM) setOperationAction(ISD::XOR , (MVT::ValueType)VT, Legal); // We can custom expand all VECTOR_SHUFFLEs to VPERM. - setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Promote); + setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Custom); setOperationAction(ISD::MUL , (MVT::ValueType)VT, Expand); setOperationAction(ISD::SDIV, (MVT::ValueType)VT, Expand); @@ -196,8 +196,6 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM) setOperationAction(ISD::SCALAR_TO_VECTOR, (MVT::ValueType)VT, Expand); } - setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); - addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass); addRegisterClass(MVT::v4i32, PPC::VRRCRegisterClass); addRegisterClass(MVT::v8i16, PPC::VRRCRegisterClass); |