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authorChris Lattner <sabre@nondot.org>2006-08-17 18:12:28 +0000
committerChris Lattner <sabre@nondot.org>2006-08-17 18:12:28 +0000
commitb5bc04d38aba1f86e9bc38b876eb7e3ea3aa0369 (patch)
tree0101525f562092cbaabf4a4ff64c971be4dfdb41
parentad1ed016ce722a6a9b27473dbf8a6e5d75ce46b1 (diff)
'g' is handled by the front-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index d9dd66d848..7a47959934 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4187,9 +4187,6 @@ X86TargetLowering::getConstraintType(char ConstraintLetter) const {
case 'S':
case 'D':
case 'c':
- case 'g': //FIXME: This over-constrains g. It should be replaced by rmi in
- // target independent code (I think this constraint is target
- // independent)
return C_RegisterClass;
default: return TargetLowering::getConstraintType(ConstraintLetter);
}
@@ -4221,7 +4218,6 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
break;
case 'r': // GENERAL_REGS
case 'R': // LEGACY_REGS
- case 'g':
if (VT == MVT::i32)
return make_vector<unsigned>(X86::EAX, X86::EDX, X86::ECX, X86::EBX,
X86::ESI, X86::EDI, X86::EBP, X86::ESP, 0);