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| author | Andrew Lenharth <andrewl@lenharth.org> | 2006-08-17 17:50:12 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2006-08-17 17:50:12 +0000 |
| commit | ad1ed016ce722a6a9b27473dbf8a6e5d75ce46b1 (patch) | |
| tree | c97e8b6118cc5947f8effc52bf3e273335d47cfc | |
| parent | f3a335cedff423438789c593d58be068b124dc1e (diff) | |
Fix handling of 'g'. Closes 883
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 7a47959934..d9dd66d848 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4187,6 +4187,9 @@ X86TargetLowering::getConstraintType(char ConstraintLetter) const { case 'S': case 'D': case 'c': + case 'g': //FIXME: This over-constrains g. It should be replaced by rmi in + // target independent code (I think this constraint is target + // independent) return C_RegisterClass; default: return TargetLowering::getConstraintType(ConstraintLetter); } @@ -4218,6 +4221,7 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, break; case 'r': // GENERAL_REGS case 'R': // LEGACY_REGS + case 'g': if (VT == MVT::i32) return make_vector<unsigned>(X86::EAX, X86::EDX, X86::ECX, X86::EBX, X86::ESI, X86::EDI, X86::EBP, X86::ESP, 0); |