diff options
author | Devang Patel <dpatel@apple.com> | 2012-01-24 21:43:36 +0000 |
---|---|---|
committer | Devang Patel <dpatel@apple.com> | 2012-01-24 21:43:36 +0000 |
commit | 3b96e1fe3b695e6d845668ea90d75016f0f46a17 (patch) | |
tree | 438f966e08e40762e31e1f2c414ce1c40d01eabe | |
parent | 5387f2e4f3b1982ee7236fa8db92f9c5152dc058 (diff) |
Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148864 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 20 | ||||
-rw-r--r-- | test/MC/X86/intel-syntax-encoding.s | 3 |
2 files changed, 18 insertions, 5 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index d78ac9f1c7..82732d8542 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1168,11 +1168,21 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, Name.startswith("rcl") || Name.startswith("rcr") || Name.startswith("rol") || Name.startswith("ror")) && Operands.size() == 3) { - X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); - if (Op1->isImm() && isa<MCConstantExpr>(Op1->getImm()) && - cast<MCConstantExpr>(Op1->getImm())->getValue() == 1) { - delete Operands[1]; - Operands.erase(Operands.begin() + 1); + if (getParser().getAssemblerDialect()) { + // Intel syntax + X86Operand *Op1 = static_cast<X86Operand*>(Operands[2]); + if (Op1->isImm() && isa<MCConstantExpr>(Op1->getImm()) && + cast<MCConstantExpr>(Op1->getImm())->getValue() == 1) { + delete Operands[2]; + Operands.pop_back(); + } + } else { + X86Operand *Op1 = static_cast<X86Operand*>(Operands[1]); + if (Op1->isImm() && isa<MCConstantExpr>(Op1->getImm()) && + cast<MCConstantExpr>(Op1->getImm())->getValue() == 1) { + delete Operands[1]; + Operands.erase(Operands.begin() + 1); + } } } diff --git a/test/MC/X86/intel-syntax-encoding.s b/test/MC/X86/intel-syntax-encoding.s index efd7b6b666..3e7ad355f4 100644 --- a/test/MC/X86/intel-syntax-encoding.s +++ b/test/MC/X86/intel-syntax-encoding.s @@ -36,3 +36,6 @@ LBB0_3: jmp LBB0_3 // CHECK: encoding: [0xf2,0x0f,0x10,0x2c,0x25,0xf8,0xff,0xff,0xff] movsd XMM5, QWORD PTR [-8] + +// CHECK: encoding: [0xd1,0xe7] + shl EDI, 1 |