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| author | Chris Lattner <sabre@nondot.org> | 2006-03-20 06:18:01 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-03-20 06:18:01 +0000 |
| commit | 39afef31502186bcb976ccb345d98dd50e852c4e (patch) | |
| tree | 73708345b4b4aee597aff927ebab3e4416e03635 | |
| parent | 3c0f9cc90cdcb70caf0dc517b9f9206d731aeb70 (diff) | |
Add a build_vector node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26895 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/TargetSelectionDAG.td | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td index c23684fee6..c3237399a0 100644 --- a/lib/Target/TargetSelectionDAG.td +++ b/lib/Target/TargetSelectionDAG.td @@ -307,7 +307,7 @@ def extld : SDNode<"ISD::EXTLOAD" , SDTExtLoad, [SDNPHasChain]>; def truncst : SDNode<"ISD::TRUNCSTORE" , SDTTruncStore, [SDNPHasChain]>; def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>; - +def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, 0, []>, []>; //===----------------------------------------------------------------------===// // Selection DAG Condition Codes diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 4414c6880e..0540f63af9 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -255,6 +255,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setOperationAction(ISD::SUB , (MVT::ValueType)VT, Expand); setOperationAction(ISD::MUL , (MVT::ValueType)VT, Expand); setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Expand); + setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Expand); } if (TM.getSubtarget<X86Subtarget>().hasMMX()) { |