diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-07-06 01:00:49 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-07-06 01:00:49 +0000 |
commit | 04c813d00ced172d9fbd26aa610e0992846a40bd (patch) | |
tree | 50a53112cdec46c2124bae7681a5e12634acf419 | |
parent | e496d78f16060ec4523a415bd62c8f010624dbac (diff) |
PredicateDefOperand -> OptionalDefOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37931 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 3e3b0eeb6c..c609ee6174 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -292,10 +292,10 @@ def ccop : ImmutablePredicateOperand<OtherVT, (ops i32imm, CCR), (ops)> { let PrintMethod = "printPredicateOperand"; } -// Conditional code result for cmp, etc. +// Conditional code result for instructions whose 's' bit is set, e.g. subs. // -def cc_out : PredicateDefOperand<OtherVT, (ops CCR), (ops (i32 zero_reg))> { - let PrintMethod = "printPredicateOperand"; +def cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 zero_reg))> { + let PrintMethod = "printSBitModifierOperand"; } //===----------------------------------------------------------------------===// |