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Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7770.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c517
1 files changed, 231 insertions, 286 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 1e86209db28..e9b532a76c3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -12,355 +12,296 @@
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
+#include <linux/sh_intc.h>
#include <linux/io.h>
-static struct plat_sci_port sci_platform_data[] = {
- {
- .mapbase = 0xff923000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 61, 61, 61, 61 },
- }, {
- .mapbase = 0xff924000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 62, 62, 62, 62 },
- }, {
- .mapbase = 0xff925000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 63, 63, 63, 63 },
- }, {
- .mapbase = 0xff926000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 64, 64, 64, 64 },
- }, {
- .mapbase = 0xff927000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 65, 65, 65, 65 },
- }, {
- .mapbase = 0xff928000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 66, 66, 66, 66 },
- }, {
- .mapbase = 0xff929000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 67, 67, 67, 67 },
- }, {
- .mapbase = 0xff92a000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 68, 68, 68, 68 },
- }, {
- .mapbase = 0xff92b000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 69, 69, 69, 69 },
- }, {
- .mapbase = 0xff92c000,
- .flags = UPF_BOOT_AUTOCONF,
- .type = PORT_SCIF,
- .irqs = { 70, 70, 70, 70 },
- }, {
- .flags = 0,
- }
+static struct plat_sci_port scif0_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
+};
+
+static struct resource scif0_resources[] = {
+ DEFINE_RES_MEM(0xff923000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0x9a0)),
};
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
.name = "sh-sci",
- .id = -1,
+ .id = 0,
+ .resource = scif0_resources,
+ .num_resources = ARRAY_SIZE(scif0_resources),
.dev = {
- .platform_data = sci_platform_data,
+ .platform_data = &scif0_platform_data,
},
};
-static struct sh_timer_config tmu0_platform_data = {
- .name = "TMU0",
- .channel_offset = 0x04,
- .timer_bit = 0,
- .clk = "peripheral_clk",
- .clockevent_rating = 200,
+static struct plat_sci_port scif1_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
};
-static struct resource tmu0_resources[] = {
- [0] = {
- .name = "TMU0",
- .start = 0xffd80008,
- .end = 0xffd80013,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 16,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource scif1_resources[] = {
+ DEFINE_RES_MEM(0xff924000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0x9c0)),
};
-static struct platform_device tmu0_device = {
- .name = "sh_tmu",
- .id = 0,
- .dev = {
- .platform_data = &tmu0_platform_data,
+static struct platform_device scif1_device = {
+ .name = "sh-sci",
+ .id = 1,
+ .resource = scif1_resources,
+ .num_resources = ARRAY_SIZE(scif1_resources),
+ .dev = {
+ .platform_data = &scif1_platform_data,
},
- .resource = tmu0_resources,
- .num_resources = ARRAY_SIZE(tmu0_resources),
};
-static struct sh_timer_config tmu1_platform_data = {
- .name = "TMU1",
- .channel_offset = 0x10,
- .timer_bit = 1,
- .clk = "peripheral_clk",
- .clocksource_rating = 200,
+static struct plat_sci_port scif2_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
};
-static struct resource tmu1_resources[] = {
- [0] = {
- .name = "TMU1",
- .start = 0xffd80014,
- .end = 0xffd8001f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 17,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource scif2_resources[] = {
+ DEFINE_RES_MEM(0xff925000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0x9e0)),
};
-static struct platform_device tmu1_device = {
- .name = "sh_tmu",
- .id = 1,
- .dev = {
- .platform_data = &tmu1_platform_data,
+static struct platform_device scif2_device = {
+ .name = "sh-sci",
+ .id = 2,
+ .resource = scif2_resources,
+ .num_resources = ARRAY_SIZE(scif2_resources),
+ .dev = {
+ .platform_data = &scif2_platform_data,
},
- .resource = tmu1_resources,
- .num_resources = ARRAY_SIZE(tmu1_resources),
};
-static struct sh_timer_config tmu2_platform_data = {
- .name = "TMU2",
- .channel_offset = 0x1c,
- .timer_bit = 2,
- .clk = "peripheral_clk",
+static struct plat_sci_port scif3_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
};
-static struct resource tmu2_resources[] = {
- [0] = {
- .name = "TMU2",
- .start = 0xffd80020,
- .end = 0xffd8002f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 18,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource scif3_resources[] = {
+ DEFINE_RES_MEM(0xff926000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xa00)),
};
-static struct platform_device tmu2_device = {
- .name = "sh_tmu",
- .id = 2,
- .dev = {
- .platform_data = &tmu2_platform_data,
+static struct platform_device scif3_device = {
+ .name = "sh-sci",
+ .id = 3,
+ .resource = scif3_resources,
+ .num_resources = ARRAY_SIZE(scif3_resources),
+ .dev = {
+ .platform_data = &scif3_platform_data,
},
- .resource = tmu2_resources,
- .num_resources = ARRAY_SIZE(tmu2_resources),
};
-static struct sh_timer_config tmu3_platform_data = {
- .name = "TMU3",
- .channel_offset = 0x04,
- .timer_bit = 0,
- .clk = "peripheral_clk",
+static struct plat_sci_port scif4_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
};
-static struct resource tmu3_resources[] = {
- [0] = {
- .name = "TMU3",
- .start = 0xffd81008,
- .end = 0xffd81013,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 19,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource scif4_resources[] = {
+ DEFINE_RES_MEM(0xff927000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xa20)),
};
-static struct platform_device tmu3_device = {
- .name = "sh_tmu",
- .id = 3,
- .dev = {
- .platform_data = &tmu3_platform_data,
+static struct platform_device scif4_device = {
+ .name = "sh-sci",
+ .id = 4,
+ .resource = scif4_resources,
+ .num_resources = ARRAY_SIZE(scif4_resources),
+ .dev = {
+ .platform_data = &scif4_platform_data,
},
- .resource = tmu3_resources,
- .num_resources = ARRAY_SIZE(tmu3_resources),
};
-static struct sh_timer_config tmu4_platform_data = {
- .name = "TMU4",
- .channel_offset = 0x10,
- .timer_bit = 1,
- .clk = "peripheral_clk",
+static struct plat_sci_port scif5_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
};
-static struct resource tmu4_resources[] = {
- [0] = {
- .name = "TMU4",
- .start = 0xffd81014,
- .end = 0xffd8101f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 20,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource scif5_resources[] = {
+ DEFINE_RES_MEM(0xff928000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xa40)),
};
-static struct platform_device tmu4_device = {
- .name = "sh_tmu",
- .id = 4,
- .dev = {
- .platform_data = &tmu4_platform_data,
+static struct platform_device scif5_device = {
+ .name = "sh-sci",
+ .id = 5,
+ .resource = scif5_resources,
+ .num_resources = ARRAY_SIZE(scif5_resources),
+ .dev = {
+ .platform_data = &scif5_platform_data,
},
- .resource = tmu4_resources,
- .num_resources = ARRAY_SIZE(tmu4_resources),
};
-static struct sh_timer_config tmu5_platform_data = {
- .name = "TMU5",
- .channel_offset = 0x1c,
- .timer_bit = 2,
- .clk = "peripheral_clk",
+static struct plat_sci_port scif6_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
};
-static struct resource tmu5_resources[] = {
- [0] = {
- .name = "TMU5",
- .start = 0xffd81020,
- .end = 0xffd8102f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 21,
- .flags = IORESOURCE_IRQ,
+static struct resource scif6_resources[] = {
+ DEFINE_RES_MEM(0xff929000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xa60)),
+};
+
+static struct platform_device scif6_device = {
+ .name = "sh-sci",
+ .id = 6,
+ .resource = scif6_resources,
+ .num_resources = ARRAY_SIZE(scif6_resources),
+ .dev = {
+ .platform_data = &scif6_platform_data,
},
};
-static struct platform_device tmu5_device = {
- .name = "sh_tmu",
- .id = 5,
- .dev = {
- .platform_data = &tmu5_platform_data,
+static struct plat_sci_port scif7_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
+};
+
+static struct resource scif7_resources[] = {
+ DEFINE_RES_MEM(0xff92a000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xa80)),
+};
+
+static struct platform_device scif7_device = {
+ .name = "sh-sci",
+ .id = 7,
+ .resource = scif7_resources,
+ .num_resources = ARRAY_SIZE(scif7_resources),
+ .dev = {
+ .platform_data = &scif7_platform_data,
},
- .resource = tmu5_resources,
- .num_resources = ARRAY_SIZE(tmu5_resources),
};
-static struct sh_timer_config tmu6_platform_data = {
- .name = "TMU6",
- .channel_offset = 0x04,
- .timer_bit = 0,
- .clk = "peripheral_clk",
+static struct plat_sci_port scif8_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
+};
+
+static struct resource scif8_resources[] = {
+ DEFINE_RES_MEM(0xff92b000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xaa0)),
};
-static struct resource tmu6_resources[] = {
- [0] = {
- .name = "TMU6",
- .start = 0xffd82008,
- .end = 0xffd82013,
- .flags = IORESOURCE_MEM,
+static struct platform_device scif8_device = {
+ .name = "sh-sci",
+ .id = 8,
+ .resource = scif8_resources,
+ .num_resources = ARRAY_SIZE(scif8_resources),
+ .dev = {
+ .platform_data = &scif8_platform_data,
},
- [1] = {
- .start = 22,
- .flags = IORESOURCE_IRQ,
+};
+
+static struct plat_sci_port scif9_platform_data = {
+ .flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
+ .type = PORT_SCIF,
+};
+
+static struct resource scif9_resources[] = {
+ DEFINE_RES_MEM(0xff92c000, 0x100),
+ DEFINE_RES_IRQ(evt2irq(0xac0)),
+};
+
+static struct platform_device scif9_device = {
+ .name = "sh-sci",
+ .id = 9,
+ .resource = scif9_resources,
+ .num_resources = ARRAY_SIZE(scif9_resources),
+ .dev = {
+ .platform_data = &scif9_platform_data,
},
};
-static struct platform_device tmu6_device = {
- .name = "sh_tmu",
- .id = 6,
+static struct sh_timer_config tmu0_platform_data = {
+ .channels_mask = 7,
+};
+
+static struct resource tmu0_resources[] = {
+ DEFINE_RES_MEM(0xffd80000, 0x30),
+ DEFINE_RES_IRQ(evt2irq(0x400)),
+ DEFINE_RES_IRQ(evt2irq(0x420)),
+ DEFINE_RES_IRQ(evt2irq(0x440)),
+};
+
+static struct platform_device tmu0_device = {
+ .name = "sh-tmu",
+ .id = 0,
.dev = {
- .platform_data = &tmu6_platform_data,
+ .platform_data = &tmu0_platform_data,
},
- .resource = tmu6_resources,
- .num_resources = ARRAY_SIZE(tmu6_resources),
+ .resource = tmu0_resources,
+ .num_resources = ARRAY_SIZE(tmu0_resources),
};
-static struct sh_timer_config tmu7_platform_data = {
- .name = "TMU7",
- .channel_offset = 0x10,
- .timer_bit = 1,
- .clk = "peripheral_clk",
+static struct sh_timer_config tmu1_platform_data = {
+ .channels_mask = 7,
};
-static struct resource tmu7_resources[] = {
- [0] = {
- .name = "TMU7",
- .start = 0xffd82014,
- .end = 0xffd8201f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 23,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource tmu1_resources[] = {
+ DEFINE_RES_MEM(0xffd81000, 0x30),
+ DEFINE_RES_IRQ(evt2irq(0x460)),
+ DEFINE_RES_IRQ(evt2irq(0x480)),
+ DEFINE_RES_IRQ(evt2irq(0x4a0)),
};
-static struct platform_device tmu7_device = {
- .name = "sh_tmu",
- .id = 7,
+static struct platform_device tmu1_device = {
+ .name = "sh-tmu",
+ .id = 1,
.dev = {
- .platform_data = &tmu7_platform_data,
+ .platform_data = &tmu1_platform_data,
},
- .resource = tmu7_resources,
- .num_resources = ARRAY_SIZE(tmu7_resources),
+ .resource = tmu1_resources,
+ .num_resources = ARRAY_SIZE(tmu1_resources),
};
-static struct sh_timer_config tmu8_platform_data = {
- .name = "TMU8",
- .channel_offset = 0x1c,
- .timer_bit = 2,
- .clk = "peripheral_clk",
+static struct sh_timer_config tmu2_platform_data = {
+ .channels_mask = 7,
};
-static struct resource tmu8_resources[] = {
- [0] = {
- .name = "TMU8",
- .start = 0xffd82020,
- .end = 0xffd8202b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 24,
- .flags = IORESOURCE_IRQ,
- },
+static struct resource tmu2_resources[] = {
+ DEFINE_RES_MEM(0xffd82000, 0x2c),
+ DEFINE_RES_IRQ(evt2irq(0x4c0)),
+ DEFINE_RES_IRQ(evt2irq(0x4e0)),
+ DEFINE_RES_IRQ(evt2irq(0x500)),
};
-static struct platform_device tmu8_device = {
- .name = "sh_tmu",
- .id = 8,
+static struct platform_device tmu2_device = {
+ .name = "sh-tmu",
+ .id = 2,
.dev = {
- .platform_data = &tmu8_platform_data,
+ .platform_data = &tmu2_platform_data,
},
- .resource = tmu8_resources,
- .num_resources = ARRAY_SIZE(tmu8_resources),
+ .resource = tmu2_resources,
+ .num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7770_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &scif7_device,
+ &scif8_device,
+ &scif9_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
- &tmu3_device,
- &tmu4_device,
- &tmu5_device,
- &tmu6_device,
- &tmu7_device,
- &tmu8_device,
- &sci_device,
};
static int __init sh7770_devices_setup(void)
@@ -368,18 +309,22 @@ static int __init sh7770_devices_setup(void)
return platform_add_devices(sh7770_devices,
ARRAY_SIZE(sh7770_devices));
}
-__initcall(sh7770_devices_setup);
+arch_initcall(sh7770_devices_setup);
static struct platform_device *sh7770_early_devices[] __initdata = {
+ &scif0_device,
+ &scif1_device,
+ &scif2_device,
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+ &scif6_device,
+ &scif7_device,
+ &scif8_device,
+ &scif9_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
- &tmu3_device,
- &tmu4_device,
- &tmu5_device,
- &tmu6_device,
- &tmu7_device,
- &tmu8_device,
};
void __init plat_early_device_setup(void)
@@ -589,17 +534,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
void __init plat_irq_setup(void)
{
/* disable IRQ7-0 */
- ctrl_outl(0xff000000, INTC_INTMSK0);
+ __raw_writel(0xff000000, INTC_INTMSK0);
/* disable IRL3-0 + IRL7-4 */
- ctrl_outl(0xc0000000, INTC_INTMSK1);
- ctrl_outl(0xfffefffe, INTC_INTMSK2);
+ __raw_writel(0xc0000000, INTC_INTMSK1);
+ __raw_writel(0xfffefffe, INTC_INTMSK2);
/* select IRL mode for IRL3-0 + IRL7-4 */
- ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+ __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
/* disable holding function, ie enable "SH-4 Mode" */
- ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+ __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
register_intc_controller(&intc_desc);
}
@@ -609,27 +554,27 @@ void __init plat_irq_setup_pins(int mode)
switch (mode) {
case IRQ_MODE_IRQ:
/* select IRQ mode for IRL3-0 + IRL7-4 */
- ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+ __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
register_intc_controller(&intc_irq_desc);
break;
case IRQ_MODE_IRL7654:
/* enable IRL7-4 but don't provide any masking */
- ctrl_outl(0x40000000, INTC_INTMSKCLR1);
- ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+ __raw_writel(0x40000000, INTC_INTMSKCLR1);
+ __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
break;
case IRQ_MODE_IRL3210:
/* enable IRL0-3 but don't provide any masking */
- ctrl_outl(0x80000000, INTC_INTMSKCLR1);
- ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+ __raw_writel(0x80000000, INTC_INTMSKCLR1);
+ __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
break;
case IRQ_MODE_IRL7654_MASK:
/* enable IRL7-4 and mask using cpu intc controller */
- ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+ __raw_writel(0x40000000, INTC_INTMSKCLR1);
register_intc_controller(&intc_irl7654_desc);
break;
case IRQ_MODE_IRL3210_MASK:
/* enable IRL0-3 and mask using cpu intc controller */
- ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+ __raw_writel(0x80000000, INTC_INTMSKCLR1);
register_intc_controller(&intc_irl3210_desc);
break;
default:
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-12-05 23:26:44 +0000