diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-01-22 21:32:52 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-27 17:16:43 +0100 |
| commit | 44dc46cd20c3e618f5bb1d9e59a329d73234e471 (patch) | |
| tree | b5d2c6f2139bef06e74294232f2f510fc4318731 | |
| parent | d50764a9511b5ac2d0f0010e32149feae1d4bbff (diff) | |
drm/i915: WaApplyL3ControlAndL3ChickenMode isn't applicable for VLV
WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in
W/A database and BSpec.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index fa256fb83a8..83bd43f3e19 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4944,8 +4944,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev) /* WaDisableL3CacheAging:vlv */ I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS); - /* WaApplyL3ControlAndL3ChickenMode:vlv */ - I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE); /* WaForceL3Serialization:vlv */ I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) & |