diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-01-22 21:32:40 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-27 17:16:42 +0100 |
| commit | d50764a9511b5ac2d0f0010e32149feae1d4bbff (patch) | |
| tree | d1918269a96f7db18f40044cb8219bec24940152 | |
| parent | fad7d36e444f763b895199624437293a90fb39d7 (diff) | |
drm/i915: We implement WaDisableL3CacheAging:vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index cf7f15ffd14..fa256fb83a8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4942,8 +4942,9 @@ static void valleyview_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1, GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC); - /* WaApplyL3ControlAndL3ChickenMode:vlv */ + /* WaDisableL3CacheAging:vlv */ I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS); + /* WaApplyL3ControlAndL3ChickenMode:vlv */ I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE); /* WaForceL3Serialization:vlv */ |