| Age | Commit message (Expand) | Author |
|---|
| 2013-01-08 | Pad Short Functions for Intel Atom | Preston Gurd |
| 2013-01-08 | Allow the asm printer to print fp128 values properly. | Tim Northover |
| 2013-01-07 | This patch addresses bug 14678 by fixing two problems in medium code model | Bill Schmidt |
| 2013-01-07 | Make the MergeGlobals pass correctly handle the address space qualifiers of t... | Silviu Baranga |
| 2013-01-06 | Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si,... | Craig Topper |
| 2013-01-06 | Fix for PR14739. It's not safe to fold a load into a call across a store. Tha... | Evan Cheng |
| 2013-01-05 | Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h... | Craig Topper |
| 2013-01-05 | Revert revision 171524. Original message: | Nadav Rotem |
| 2013-01-04 | The current Intel Atom microarchitecture has a feature whereby when a function | Preston Gurd |
| 2013-01-04 | [mips] MipsTargetLowering::getSetCCResultType should return a vector type if | Akira Hatanaka |
| 2013-01-04 | Revert revision: 171467. This transformation is incorrect and makes some test... | Nadav Rotem |
| 2013-01-03 | Simplified TRUNCATE operation that comes after SETCC. It is possible since SE... | Elena Demikhovsky |
| 2013-01-03 | Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe... | Michael Gottesman |
| 2013-01-03 | Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi... | Craig Topper |
| 2013-01-03 | Fix PR14732 by handling all kinds of IMPLICIT_DEF live ranges. | Jakob Stoklund Olesen |
| 2013-01-02 | DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes | Tom Stellard |
| 2013-01-02 | AVX: Fix a bug in WidenMaskArithmetic. | Nadav Rotem |
| 2012-12-30 | Support ppcf128 in SelectionDAG::getConstantFP | Hal Finkel |
| 2012-12-30 | Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a Mod... | Dmitri Gribenko |
| 2012-12-28 | AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these optimi... | Nadav Rotem |
| 2012-12-27 | On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized | Nadav Rotem |
| 2012-12-26 | llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083. | NAKAMURA Takumi |
| 2012-12-26 | llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082. | NAKAMURA Takumi |
| 2012-12-25 | Loosen scheduling restrictions on the PPC dcbt intrinsic | Hal Finkel |
| 2012-12-25 | Expand PPC64 atomic load and store | Hal Finkel |
| 2012-12-25 | Harden test so it's not affected by changes to compare lowering. | Benjamin Kramer |
| 2012-12-25 | X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use o... | Benjamin Kramer |
| 2012-12-25 | X86: Custom lower <2 x i64> eq and ne when SSE41 is not available. | Benjamin Kramer |
| 2012-12-24 | llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple. | NAKAMURA Takumi |
| 2012-12-24 | Some x86 instructions can load/store one of the operands to memory. On SSE, t... | Nadav Rotem |
| 2012-12-22 | X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available. | Benjamin Kramer |
| 2012-12-22 | X86: Emit vector sext as shuffle + sra if vpmovsx is not available. | Benjamin Kramer |
| 2012-12-21 | In some cases, due to scheduling constraints we copy the EFLAGS. | Nadav Rotem |
| 2012-12-21 | try to unbreak ppc buildbots. | Benjamin Kramer |
| 2012-12-21 | X86: Match pmin/pmax as a target specific dag combine. This occurs during vec... | Benjamin Kramer |
| 2012-12-21 | R600: Expand vec4 INT <-> FP conversions | Tom Stellard |
| 2012-12-21 | Add test case for r170674 | Reed Kotler |
| 2012-12-21 | Move these files over to the debug info directory. | Eric Christopher |
| 2012-12-20 | Revert "Adding support for llvm.arm.neon.vaddl[su].* and" | Bob Wilson |
| 2012-12-20 | On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, | Evan Cheng |
| 2012-12-20 | Simplify the testcase a bit. | Rafael Espindola |
| 2012-12-20 | Adding support for llvm.arm.neon.vaddl[su].* and | Renato Golin |
| 2012-12-20 | fix most of remaining issues with large frames. | Reed Kotler |
| 2012-12-20 | [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy | Akira Hatanaka |
| 2012-12-20 | Do not introduce vector operations in functions marked with noimplicitfloat. | Bob Wilson |
| 2012-12-19 | LLVM sdisel normalize bit extraction of the form: | Evan Cheng |
| 2012-12-19 | PowerPC: Expand VSELECT nodes. | Benjamin Kramer |
| 2012-12-19 | Optimized load + SIGN_EXTEND patterns in the X86 backend. | Elena Demikhovsky |
| 2012-12-19 | After reducing the size of an operation in the DAG we zero-extend the reduced | Nadav Rotem |
| 2012-12-19 | Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be ... | Craig Topper |
