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AgeCommit message (Expand)Author
2011-01-01ptx: remove reg-reg addressing mode and st.constChe-Liang Chiou
2011-01-01ptx: add store instructionChe-Liang Chiou
2010-12-30ptx: add state spacesChe-Liang Chiou
2010-12-29test/CodeGen/X86/negative-sin.ll: FileCheck-ize.NAKAMURA Takumi
2010-12-29test/CodeGen/X86/fp-in-intregs.ll: FileCheck-ize.NAKAMURA Takumi
2010-12-23Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.Bob Wilson
2010-12-23Fixes PR8823: add-with-overflow-128.llAndrew Trick
2010-12-22DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal....Benjamin Kramer
2010-12-22X86: Lower a select directly to a setcc_carry if possible.Benjamin Kramer
2010-12-22ptx: add ld instruction and testChe-Liang Chiou
2010-12-22Fix a bug in ReduceLoadWidth that wasn't handling extendingChris Lattner
2010-12-21Reapply 122353-122355 with fixes. 122354 was wrong;Dale Johannesen
2010-12-21Add some x86 specific dagcombines for conditional increments.Benjamin Kramer
2010-12-21Revert 122353-122355 for the moment, they broke stuff.Dale Johannesen
2010-12-21Add a new transform to DAGCombiner.Dale Johannesen
2010-12-21Get the type of a shift from the shift, not from its shiftDale Johannesen
2010-12-21Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.Bob Wilson
2010-12-20Cosmetic changes.Dale Johannesen
2010-12-20temporarily disable this: PR8823.Chris Lattner
2010-12-20now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,Chris Lattner
2010-12-20We lower setb to sbb with the hope that the and will go away, when it Chris Lattner
2010-12-20Add comment for testcase for 122206Mon P Wang
2010-12-19Prevents PerformShuffleCombine from creating a node with an illegal type afte...Mon P Wang
2010-12-19improve the setcc -> setcc_carry optimization to happen moreChris Lattner
2010-12-19now that generic vector types aren't selected onto MMX registers, theseChris Lattner
2010-12-19add a general coverage test for overflow intrinsics.Chris Lattner
2010-12-19fix PR8642: if a critical edge has a PHI value that can trap,Chris Lattner
2010-12-19move this test into the ARM test so that it is only run when the arm backendChris Lattner
2010-12-18Restore the behavior of frame lowering before my refactoring.Anton Korobeynikov
2010-12-18Just rename the functions, relying on matching a instruction that has the sam...Benjamin Kramer
2010-12-18Test more than just label names and make test work on non-x86 hosts.Benjamin Kramer
2010-12-18Fix result type of Neon floating-point comparisons against zero.Bob Wilson
2010-12-17During local stack slot allocation, the materializeFrameBaseRegister functionBill Wendling
2010-12-17Fix a DAGCombiner crash when folding binary vector operations with constantBob Wilson
2010-12-17Combine several vector-related DAGCombiner tests.Bob Wilson
2010-12-17Add support for matching psign & plendvb to the x86 targetNate Begeman
2010-12-17Add a transform to DAG Combiner. This improves theDale Johannesen
2010-12-17Don't feed 19 bit immediates to ILA.Kalle Raiskila
2010-12-17Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.Bob Wilson
2010-12-161. ARM/MC/ELF: A few more ELF relocs for .oJason W Kim
2010-12-15Thumb1 had two patterns for the same load-from-constant-pool instruction.Jim Grosbach
2010-12-15Don't handle -arm-long-calls in fast isel for now.Eric Christopher
2010-12-15Teach machine cse to commute instructions.Evan Cheng
2010-12-15Add Neon VCVT instructions for f32 <-> f16 conversions.Bob Wilson
2010-12-15Lower the MBlaze target specific calling conventions for "interrupt_handler"Wesley Peck
2010-12-15take care of some todos, transforming [us]mul_lohi into Chris Lattner
2010-12-15merge two testsChris Lattner
2010-12-14Fix a minor bug in two-address pass. It was missing a commute opportunity.Evan Cheng
2010-12-14bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663Evan Cheng
2010-12-14fix fixme case typo :-) Jason W Kim