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2012-05-22revert my previous patches that introduced an additional parameter to the ↵Nuno Lopes
objectsize intrinsic. After a lot of discussion, we realized it's not the best option for run-time bounds checking git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157255 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22Only erase virtregs with no uses left.Jakob Stoklund Olesen
Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21FileCheck'ize test, and add a bit to test for r157221.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21Allow 256-bit shuffles to still be split even if only half of the shuffle ↵Craig Topper
comes from two 128-bit pieces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157175 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne
may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Add a missing PPC 64-bit stwu pattern.Hal Finkel
This seems to fix the remaining compile-time failures on PPC64 when compiling with -enable-ppc-preinc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157159 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Use the right register class for LDRrs.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Transfer memory operands to the right instruction.Jakob Stoklund Olesen
They need to go on the PICLDR as the verifier points out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Properly constrain register classes for sub-registers.Jakob Stoklund Olesen
Not all GR64 registers have sub_8bit sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Properly constrain register classes in 2-addr.Jakob Stoklund Olesen
X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Fix 12892.Jakob Stoklund Olesen
Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Erase joined copies immediately.Jakob Stoklund Olesen
The late dead code elimination is no longer necessary. The test changes are cause by a register hint that can be either %rdi or %rax. The choice depends on the use list order, which this patch changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157129 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Add support for additional in-reg vbroadcast patternsNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157127 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Add support for the 'd' mips inline asm output modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Refactor data-in-code annotations.Jim Grosbach
Use a dedicated MachO load command to annotate data-in-code regions. This is the same format the linker produces for final executable images, allowing consistency of representation and use of introspection tools for both object and executable files. Data-in-code regions are annotated via ".data_region"/".end_data_region" directive pairs, with an optional region type. data_region_directive := ".data_region" { region_type } region_type := "jt8" | "jt16" | "jt32" | "jta32" end_data_region_directive := ".end_data_region" The previous handling of ARM-style "$d.*" labels was broken and has been removed. Specifically, it didn't handle ARM vs. Thumb mode when marking the end of the section. rdar://11459456 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Add support for the mips 'x' inline asm modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng
non-profitable commute using outdated info. The test case would still fail because of poor pre-RA schedule. That will be fixed by MI scheduler. rdar://11472010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157038 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Remove a test that was only testing for physreg joining.Jakob Stoklund Olesen
This is the same as the other tests: Clever tricks are required to make the arguments and return value line up in a single-instruction function. It rarely happens in real life. We have plenty other examples of this behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove -join-physregs from the test suite.Jakob Stoklund Olesen
This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove incorrect pattern for ARM SMML instruction.Tim Northover
Patch by Meador Inge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156989 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-16Avoid creating a cycle when folding load / op with flag / store. PR11451474. ↵Evan Cheng
rdar://11451474 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen
It is now possible to coalesce weird skewed sub-register copies by picking a super-register class larger than both original registers. The included test case produces code like this: vld2.32 {d16, d17, d18, d19}, [r0]! vst2.32 {d18, d19, d20, d21}, [r0] We still perform interference checking as if it were a normal full copy join, so this is still quite conservative. In particular, the f1 and f2 functions in the included test case still have remaining copies because of false interference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15Enable all Hexagon tests.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156824 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Fix PR12821.Jakob Stoklund Olesen
RAFast must add an <imp-def> operand when it is rewriting a sub-register def that isn't a read-modify-write. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Revert 156634 upon request until code improvement changes are made.Brendon Cahoon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Support for Hexagon feature, New Value Jump.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156698 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Fix test cases.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156697 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka
- Remove code which lowers pseudo SETGP01. - Fix LowerSETGP01. The first two of the three instructions that are emitted to initialize the global pointer register now use register $2. - Stop emitting .cpload directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156689 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Insert instructions to the entry basic block which initializes the globalAkira Hatanaka
pointer register. This is the first of the series of patches which clean up the way global pointer register is used. The patches will make the following improvements: - Make $gp an allocatable temporary register rather than reserving it. - Use a virtual register as the global pointer register and let the register allocator decide which register to assign to it or whether spill/reloads are needed. - Make sure $gp is valid at the entry of a called function, which is necessary for functions using lazy binding. - Remove the need for emitting .cprestore and .cpload directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156671 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Do not replace operands of pseudo instructions with register $zero.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156663 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Use regular expression to match register names. Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Add support for selecting @llvm.trap().Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Hexagon constant extender support.Brendon Cahoon
Patch by Jyotsna Verma. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. ↵Chad Rosier
Minor cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier
retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Fix test/CodeGen/X86/tls-pie.ll.Hans Wennborg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg
This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong code here (see the update to test/CodeGen/X86/tls-pie.ll). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11ARM: peephole optimization to remove cmp instructionManman Ren
This patch will optimize the following cases: sub r1, r3 | sub r1, imm cmp r3, r1 or cmp r1, r3 | cmp r1, imm bge L1 TO subs r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can replace "sub" with "subs" and eliminate the "cmp" instruction. rdar: 10734411 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman
but it generates int3 on x86 instead of ud2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Add support for the 'X' inline asm operand modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Hexagon V5 FP Support.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren
This commit broke an external linux bot and gave a compile-time warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10ARM: peephole optimization to remove cmp instructionManman Ren
This patch will optimize the following cases: sub r1, r3 | sub r1, imm cmp r3, r1 or cmp r1, r3 | cmp r1, imm bge L1 TO subs r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can replace "sub" with "subs" and eliminate the "cmp" instruction. rdar: 10734411 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156550 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10AVX2: Add an additional broadcast idiom.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in ↵Nadav Rotem
the program. Starting r155461 we are able to select patterns for vbroadcast even when the load op is used by other users. Fix PR11900. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156539 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-09Added a regress test for the bug #9964 before close it.Danil Malyshev
This bug was fixed by Jim Grosbach in #138879, thanks Jim! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156505 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-09change the objectsize intrinsic signature: add a 3rd parameter to denote the ↵Nuno Lopes
maximum runtime performance penalty that the user is willing to accept. This commit only adds the parameter. Code taking advantage of it will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156473 91177308-0d34-0410-b5e6-96231b3b80d8
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