emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Collapse)	Author
2011-04-05	These tests no longer require linear scan because reserved register ↵	Jakob Stoklund Olesen
	coalescing is now universal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31	Fix Mips, Sparc, and XCore tests that were dependent on register allocation.	Jakob Stoklund Olesen
	Add an extra run with -regalloc=basic to keep them honest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-21	Sparc backend:	Venkatraman Govindaraju
	Rename FLUSH to FLUSHW. Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12	Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.	Venkatraman Govindaraju
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8