| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-05-02 | Hexagon - Add peephole optimizations for zero extends. | Pranav Bhandarkar | |
| * lib/Target/Hexagon/HexagonInstrInfo.td: Add patterns to combine a sequence of a pair of i32->i64 extensions followed by a "bitwise or" into COMBINE_rr. * lib/Target/Hexagon/HexagonPeephole.cpp: Copy propagate Rx in the instruction Rp = COMBINE_Ir_V4(0, Rx) to the uses of Rp:subreg_loreg. * test/CodeGen/Hexagon/union-1.ll: New test. * test/CodeGen/Hexagon/combine_ir.ll: Fix test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180946 91177308-0d34-0410-b5e6-96231b3b80d8 | |||
| 2013-02-04 | Hexagon: Add V4 combine instructions and some more Def Pats for V2. | Jyotsna Verma | |
| git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174331 91177308-0d34-0410-b5e6-96231b3b80d8 | |||
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