aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/ARM/fast-isel-ldr-str-arm.ll
AgeCommit message (Collapse)Author
2013-05-29Apply LLVM upstream: r181801 - Fix ARM FastISel tests, as a first step to ↵JF Bastien
enabling ARM FastISel ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working on enabling it for other targets. As a first step I've fixed some of the tests. Changes to ARM FastISel tests: - Different triples don't generate the same relocations (especially movw/movt versus constant pool loads). Use a regex to allow either. - Mangling is different. Use a regex to allow either. - The reserved registers are sometimes different, so registers get allocated in a different order. Capture the names only where this occurs. - Add -verify-machineinstrs to some tests where it works. It doesn't work everywhere it should yet. - Add -fast-isel-abort to many tests that didn't have it before. - Split out the VarArg test from fast-isel-call.ll into its own test. This simplifies test setup because of --check-prefix. R=dschuff@chromium.org Review URL: https://codereview.chromium.org/15737029
2011-11-14Add newline to end of file. Thanks, Eli.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-14Fix a performance regression from r144565. Positive offsets were being loweredChad Rosier
into registers, rather then encoded directly in the load/store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144576 91177308-0d34-0410-b5e6-96231b3b80d8