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path: root/lib/Target/PowerPC/PPCISelPattern.cpp
AgeCommit message (Expand)Author
2005-07-01Varargs is apparently currently broken on PPC. This hacks it so that itChris Lattner
2005-06-15Commit fix for generating conditional branch pseudo instructions thatNate Begeman
2005-06-14Commit a small improvement that is already in the x86 and ia64 backends toNate Begeman
2005-06-08Handle some more real world cases of rlwimi. These don't come up thatNate Begeman
2005-05-15Fix andrews changes to fit in 80 columnsChris Lattner
2005-05-13treat TAILCALL nodes identically to CALL nodesChris Lattner
2005-05-13Add an isTailCall flag to LowerCallToChris Lattner
2005-05-13Realize that we don't support fmod directly, fixing CodeGen/Generic/print-ari...Chris Lattner
2005-05-12rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.Chris Lattner
2005-05-12Pass in Calling Convention to use into LowerCallToChris Lattner
2005-05-12These targets don't like setccChris Lattner
2005-05-11Necessary changes to codegen cttz efficiently on PowerPCNate Begeman
2005-05-09fold and (shl X, C1), C2 -> rlwinm when possible. Many other cases are possi...Chris Lattner
2005-05-04fix typoAndrew Lenharth
2005-05-03Implement count leading zeros (ctlz), count trailing zeros (cttz), and countAndrew Lenharth
2005-04-30This target doesn't support the FSIN/FCOS/FSQRT nodes yetChris Lattner
2005-04-27Implement Value* tracking for loads and stores in the selection DAG. This en...Andrew Lenharth
2005-04-22Convert tabs to spacesMisha Brukman
2005-04-21Remove trailing whitespaceMisha Brukman
2005-04-21Match another form of eqvChris Lattner
2005-04-18Next round of PPC CR optimizations. For the following code:Nate Begeman
2005-04-18Change codegen for setcc to read the bit directly out of the conditionNate Begeman
2005-04-15Make pattern isel default for ppcNate Begeman
2005-04-14Implement multi-way branches through logical ops on condition registers.Nate Begeman
2005-04-13Start allocating condition registers. Almost all explicit uses of CR0 areNate Begeman
2005-04-13Implement the fold shift X, zext(Y) -> shift X, Y at the target level,Nate Begeman
2005-04-13Disbale the broken fold of shift + sz[ext] for nowNate Begeman
2005-04-13remove one more occurance of this that snuck inChris Lattner
2005-04-13Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emitChris Lattner
2005-04-12Fold shift by size larger than type size to undefNate Begeman
2005-04-12Implement setcc op, -1 sequencesNate Begeman
2005-04-12Implement bitfield clearsNate Begeman
2005-04-11Add recording variants of ISD::AND and ISD::OR. This kills almost 1000Nate Begeman
2005-04-10Fix another fixme: factor out the constant fp generation code.Nate Begeman
2005-04-10Fix 64 bit argument loading that straddles the args in regs / args on stackNate Begeman
2005-04-10Make sure that BRCOND branches can be converted into long branches too.Nate Begeman
2005-04-10Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod.Nate Begeman
2005-04-09fix ISD::BRCONDTWOWAY codegen to not deference the end() iteratorNate Begeman
2005-04-09do not set the root to null if an argument is deadChris Lattner
2005-04-09Add rlwnm instruction for variable rotateNate Begeman
2005-04-09Optimize FSEL a bit for fneg arguments. This fixes the recently added testNate Begeman
2005-04-09This target does not yet support ISD::BRCONDTWOWAYChris Lattner
2005-04-0964b: Expand S/UREMNate Begeman
2005-04-07Optimized code sequences for setcc reg, 0Nate Begeman
2005-04-07PowerPC zero extends setcc resultsChris Lattner
2005-04-06Pattern match bitfield insert, which helps shift long by immediate, amongNate Begeman
2005-04-06Fixed version of optimized integer divide is now fixed. Calculate theNate Begeman
2005-04-06Turn off the div -> mul optimization until it works correctly 100% of theNate Begeman
2005-04-06Add support for MULHS and MULHU nodesNate Begeman
2005-04-05Back out the previous change to SelectBranchCC, since there are cases itNate Begeman