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LLVM with the emscripten fastcomp javascript backend
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ARM
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2011-08-22
Thumb assemmbly parsing diagnostic improvements for LDM.
Jim Grosbach
2011-08-22
Temporarilly mark tMUL as not commutable.
Jim Grosbach
2011-08-22
Provide operand encoding information for half-precision VCVT instructions. F...
Owen Anderson
2011-08-22
Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming major...
Owen Anderson
2011-08-22
Tighten up ARM reglist validation a bit.
Jim Grosbach
2011-08-22
Fix another batch of VLD/VST decoding crashes discovered by randomized testing.
Owen Anderson
2011-08-22
Correct writeback handling of duplicating VLD instructions. Discovered by ra...
Owen Anderson
2011-08-22
Clean up predicates on ARM target instruction aliases.
Jim Grosbach
2011-08-22
Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add ...
Owen Anderson
2011-08-20
Remove the VMOVQQ pseudo instruction.
Chad Rosier
2011-08-20
Remove VMOVQQQQ pseudo instruction.
Chad Rosier
2011-08-20
Add <imp-def> operands to QQ and QQQQ stack loads.
Jakob Stoklund Olesen
2011-08-20
VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg.
Chad Rosier
2011-08-19
Thumb parsing and encoding support for NOP.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for NEG.
Jim Grosbach
2011-08-19
Fix NEG alias
Jim Grosbach
2011-08-19
Be more lenient on tied operand matching for MUL.
Jim Grosbach
2011-08-19
Update tests.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for MUL.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for MOV.
Jim Grosbach
2011-08-19
Tidy up. Tab character.
Jim Grosbach
2011-08-19
Tab characters.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LSL(immediate).
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LDRSB and LDRSH.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LDRH.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LDRB.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LDR(literal).
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LDR(immediate) form T2.
Jim Grosbach
2011-08-19
Use helper function to check for low registers.
Jim Grosbach
2011-08-19
Thumb assembly parsing and encoding for LDR(immediate) form T1.
Jim Grosbach
2011-08-19
Add explanatory comment.
Jim Grosbach
2011-08-19
Make a bunch of symbols private.
Benjamin Kramer
2011-08-18
STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST fo...
Owen Anderson
2011-08-18
Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs ...
Owen Anderson
2011-08-18
Remember to fill in some operands so we can print _something_ coherent even w...
Owen Anderson
2011-08-18
Improve handling of failure and unpredictable cases for CPS, STR, and SMLA in...
Owen Anderson
2011-08-18
Thumb assembly parsing and encoding for LDM instruction.
Jim Grosbach
2011-08-18
Thumb assembly parsing and encoding for CMP.
Jim Grosbach
2011-08-18
Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.
Jim Grosbach
2011-08-18
ARM Thumb blx instruction fixup has same data range as bl.
Jim Grosbach
2011-08-18
80 columns.
Jim Grosbach
2011-08-18
Add missing 'break'.
Jim Grosbach
2011-08-17
Remove extraneous newline from operand print method. PR10569.
Jim Grosbach
2011-08-17
Clean up patterns for Thumb1 system instructions.
Jim Grosbach
2011-08-17
Thumb assembly parsing and encoding for B.
Jim Grosbach
2011-08-17
Thumb assembly parsing and encoding for ASR.
Jim Grosbach
2011-08-17
Tidy up. 80 columns.
Jim Grosbach
2011-08-17
ARM clean up the imm_sr operand class representation.
Jim Grosbach
2011-08-17
Fix predicate for imm1_32
Jim Grosbach
2011-08-17
Thumb assembly parsing and encoding for ADR.
Jim Grosbach
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