emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Expand)	Author
2012-12-27	Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions...	Craig Topper
2012-12-26	Fix operands and encoding form for ARPL instruction. Register form had and ...	Craig Topper
2012-12-26	Add hasSideEffects=0 to some atomic instructions.	Craig Topper
2012-12-26	Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ...	Craig Topper
2012-12-26	Mark all the _REV instructions as not having side effects. They aren't really...	Craig Topper
2012-12-26	Remove a special conditional setting of neverHasSideEffects if the instructio...	Craig Topper
2012-12-26	Merge still more SSE/AVX instruction definitions.	Craig Topper
2012-12-26	Merge more SSE/AVX instruction definitions.	Craig Topper
2012-12-26	Fix 80 column violation.	Craig Topper
2012-12-26	Fix class name in comment.	Craig Topper
2012-12-26	Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.	Craig Topper
2012-12-26	Remove 'v' from mnemonic to fix asm matching failures.	Craig Topper
2012-12-26	Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction def...	Craig Topper
2012-12-26	Reformat the docs.	Nadav Rotem
2012-12-26	Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction def...	Craig Topper
2012-12-26	Merge an AVX/SSE 256-bit and 128-bit multiclass.	Craig Topper
2012-12-26	Mark VANDNPD/VANDNPDS as not commutable.	Craig Topper
2012-12-26	Remove alignment from a bunch more VEX encoded operations in the folding tables.	Craig Topper
2012-12-26	Remove alignment from folding table for VMOVUPD as an unaligned instruction i...	Craig Topper
2012-12-26	Remove alignment requirements from (V)EXTRACTPS. This instruction does 32-bit...	Craig Topper
2012-12-26	Remove alignment requirement from VCVTSS2SD in folding tables. Reverting r171...	Craig Topper
2012-12-25	Expand PPC64 atomic load and store	Hal Finkel
2012-12-25	X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use o...	Benjamin Kramer
2012-12-25	X86: Custom lower <2 x i64> eq and ne when SSE41 is not available.	Benjamin Kramer
2012-12-25	VCVTSS2SD requires a strict alignment. Thanks Elena.	Nadav Rotem
2012-12-24	Quiet gcc's -Wparenthesis warning. No functionality change.	Nick Lewycky
2012-12-24	Use a std::string rather than a dynamically allocated char* buffer.	Benjamin Kramer
2012-12-24	CostModel: We have API for checking the costs of known shuffles. This patch adds	Nadav Rotem
2012-12-24	Some x86 instructions can load/store one of the operands to memory. On SSE, t...	Nadav Rotem
2012-12-24	Change the codegen Cost Model API for shuffeles. This patch removes the API f...	Nadav Rotem
2012-12-23	CostModel: Change the default target-independent implementation for finding	Nadav Rotem
2012-12-23	whitespace	Nadav Rotem
2012-12-23	Rename a function.	Nadav Rotem
2012-12-23	Loop Vectorizer: Update the cost model of scatter/gather operations and make	Nadav Rotem
2012-12-22	X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available.	Benjamin Kramer
2012-12-22	X86: Emit vector sext as shuffle + sra if vpmovsx is not available.	Benjamin Kramer
2012-12-21	In some cases, due to scheduling constraints we copy the EFLAGS.	Nadav Rotem
2012-12-21	[mips] Refactor subword-swap, EXT/INS, load-effective-address and read-hardware	Akira Hatanaka
2012-12-21	[mips] Refactor SYNC and multiply/divide instructions.	Akira Hatanaka
2012-12-21	[mips] Refactor BAL instructions.	Akira Hatanaka
2012-12-21	[mips] Fix encoding of BAL instruction. Also, fix assembler test case which	Akira Hatanaka
2012-12-21	[mips] Refactor jump, jump register, jump-and-link and nop instructions.	Akira Hatanaka
2012-12-21	[mips] Refactor load/store left/right and load-link and store-conditional	Akira Hatanaka
2012-12-21	[mips] Refactor load/store instructions.	Akira Hatanaka
2012-12-21	[mips] Remove unnecessary isPseudo parameter.	Akira Hatanaka
2012-12-21	[mips] Refactor LUI instruction.	Akira Hatanaka
2012-12-21	[mips] Refactor count leading zero or one instructions.	Akira Hatanaka
2012-12-21	[mips] Refactor sign-extension-in-register instructions.	Akira Hatanaka
2012-12-21	[mips] Refactor instructions which copy from and to HI/LO registers.	Akira Hatanaka
2012-12-21	[mips] Refactor logical NOR instructions.	Akira Hatanaka