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path: root/lib/CodeGen/VirtRegMap.cpp
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2006-12-14Fix a long-standing spiller bug:Evan Cheng
If a spillslot value is available in a register, and there is a noop copy that targets that register, the spiller correctly decide not to invalidate the spillslot register. However, even though the noop copy does not clobbers the value. It does start a new intersecting live range. That means the spillslot register is available for use but should not be reused for a two-address instruction modref operand which would clobber the new live range. When we remove the noop copy, update the available information by clearing the canClobber bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32576 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-08Move findTiedToSrcOperand to TargetInstrDescriptor.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-08Proper fix for PR1037: to determine is a VR is a modref, check 1) whether it isEvan Cheng
tied to another oeprand, 2) whether is is being tied to by another operand. So the destination operand of a two-address MI can be correctly identified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32354 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07Revision 1.83 causes PR1037.Reid Spencer
Reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, areBill Wendling
now cerr, cout, and NullStream resp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32298 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07MI keeps a ptr of TargetInstrDescriptor, use it.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32296 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07getOperandConstraint returns -1 if the operand does have the specific ↵Evan Cheng
constraint. This bug was causing excessive spills. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32295 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06Detemplatize the Statistic class. The only type it is instantiated withChris Lattner
is 'unsigned'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-01Match TargetInstrInfo changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17More removal of std::cerr and DEBUG, replacing with DOUT instead.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-04Fixed some spiller bugs exposed by the recent two-address code changes. NowEvan Cheng
there may be other def(s) apart from the use&def two-address operand. We need to check if the register reuse for a use&def operand may conflicts with another def. Provide a mean to recover from the conflict if it is detected when the defs are processed later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31439 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01RenameEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01Two-address instructions no longer have to be A := A op C. Now any pair of ↵Evan Cheng
dest / src operands can be tied together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31363 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12restore my previous patch, now that the X86 backend bug has been fixed:Chris Lattner
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12Backing out Chris' last commit. It's breaking llvm-gcc bootstrapping.Evan Cheng
It's turning: movl -24(%ebp), %esp subl $16, %esp movl -24(%ebp), %ecx into movl -24(%ebp), %esp subl $16, %esp movl %esp, (%esp) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30902 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12If we see a load from a stack slot into a physreg, consider it as providingChris Lattner
the stack slot. This fixes PR943. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05Fix a long-standing wart in the code generator: two-address instruction loweringChris Lattner
actually *removes* one of the operands, instead of just assigning both operands the same register. This make reasoning about instructions unnecessarily complex, because you need to know if you are before or after register allocation to match up operand #'s with the target description file. Changing this also gets rid of a bunch of hacky code in various places. This patch also includes changes to fold loads into cmp/test instructions in the X86 backend, along with a significant simplification to the X86 spill folding code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-27s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24Take advantage of the recent improvements to the liveintervals set (trackingChris Lattner
instructions which define each value#) to simplify and improve the coallescer. In particular, this patch: 1. Implements iterative coallescing. 2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a better solution. 3. Implements PR865, "coallescing" away the second copy in code like: A = B ... B = A This also includes changes to symbolically print registers in intervals when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21Added a check so that if we have two machine instructions in this formBill Wendling
MOV R0, R1 MOV R1, R0 the second machine instruction is removed. Added a regression test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21Eliminate data relocations by using NULL instead of global empty list.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20Reduce number of exported symbolsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29220 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04Move some methods out of MachineInstr into MachineOperandChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01Fix a latent bug that my spiller patch last week exposed: we were leavingChris Lattner
instructions in the virtregfolded map that were deleted. Because they were deleted, newly allocated instructions could end up at the same address, magically finding themselves in the map. The solution is to remove entries from the map when we delete the instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28041 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01When promoting a load to a reg-reg copy, where the load was a previousChris Lattner
instruction folded with spill code, make sure the remove the load from the virt reg folded map. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01Remove previous patch, which wasn't quite right.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28039 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01Remove temp. option -spiller-check-liveout, it didn't cause any failure nor ↵Evan Cheng
performance regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28029 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-30Local spiller kills a store if the folded restore is turned into a copy.Evan Cheng
But this is incorrect if the spilled value live range extends beyond the current BB. It is currently controlled by a temporary option -spiller-check-liveout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28Mapping of physregs can make it so that the designated and input physregs areChris Lattner
the same. In this case, don't emit a noop copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28008 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28When we have a two-address instruction where the input cannot be clobberedChris Lattner
and is already available, instead of falling back to emitting a load, fall back to emitting a reg-reg copy. This generates significantly better code for some SSE testcases, as SSE has lots of two-address instructions and none of them are read/modify/write. As one example, this change does: pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255 xorps %XMM2, %XMM5 cmpltps %XMM1, %XMM0 - movaps XMMWORD PTR [%ESP + 52], %XMM0 - movapd %XMM6, XMMWORD PTR [%ESP + 52] + movaps %XMM6, %XMM0 cmpltps %XMM6, XMMWORD PTR [%ESP + 68] movapd XMMWORD PTR [%ESP + 52], %XMM6 movaps %XMM6, %XMM0 cmpltps %XMM6, XMMWORD PTR [%ESP + 36] cmpltps %XMM3, %XMM0 - movaps XMMWORD PTR [%ESP + 20], %XMM0 - movapd %XMM7, XMMWORD PTR [%ESP + 20] + movaps %XMM7, %XMM0 cmpltps %XMM7, XMMWORD PTR [%ESP + 4] movapd XMMWORD PTR [%ESP + 20], %XMM7 cmpltps %XMM4, %XMM0 ... which is far better than a store followed by a load! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28001 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Fix a bug that Evan exposed with some changes he's making, and that wasChris Lattner
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc). When reloading a reused reg, make sure to invalidate the reloaded reg, and check to see if there are any other pending uses of the same register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Remove debugging printout :)Chris Lattner
Add a minor compile time win, no codegen change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Refactor some code from being inline to being out in a new class with methods.Chris Lattner
This gets rid of two gotos, which is always nice, and also adds some comments. No functionality change, this is just a refactor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Fix VC++ warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Handle another case exposed on X86.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Fix a nasty problem on two-address machines in the following situation:Chris Lattner
store EAX -> [ss#0] [ss#0] += 1 ... use(EAX) In this case, it is not valid to rewrite this as: store EAX -> [ss#0] EAX += 1 store EAX -> [ss#0] ;;; this would also delete the store above ... use(EAX) ... because EAX is not a dead at that point. Keep track of which registers we are allowed to clobber, and which ones we aren't, and don't clobber the ones we're not supposed to. :) This should resolve the issues on X86 last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailableChris Lattner
and PhysRegsAvailable maps out into a new AvailableSpills struct. No functionality change. This paves the way for a bugfix, coming up next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Fix VC++ compilation error caused by using a std::map iterator variable to ↵Jeff Cohen
receive a std::multimap iterator value. For some reason, GCC doesn't have a problem with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Remove move copies and dead stuff by not clobbering the result reg of a noop ↵Chris Lattner
copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Simplify some codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25924 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Add code that checks for noop copies, which triggers when either:Chris Lattner
1. a target doesn't know how to fold load/stores into copies, or 2. the spiller rewrites the input to a copy to the same register as the dest instead of to the reloaded reg. This will be moved/improved in the near future, but allows elimination of some ancient x86 hacks. This eliminates 92 copies from SMG2000 on X86 and 163 copies from 252.eon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03Physregs may hold multiple stack slot values at the same time. Keep trackChris Lattner
of this, and use it to our advantage (bwahahah). This allows us to eliminate another 60 instructions from smg2000 on PPC (probably significantly more on X86). A common old-new diff looks like this: stw r2, 3304(r1) - lwz r2, 3192(r1) stw r2, 3300(r1) - lwz r2, 3192(r1) stw r2, 3296(r1) - lwz r2, 3192(r1) stw r2, 3200(r1) - lwz r2, 3192(r1) stw r2, 3196(r1) - lwz r2, 3192(r1) + or r2, r2, r2 stw r2, 3188(r1) and - lwz r31, 604(r1) - lwz r13, 604(r1) - lwz r14, 604(r1) - lwz r15, 604(r1) - lwz r16, 604(r1) - lwz r30, 604(r1) + or r31, r30, r30 + or r13, r30, r30 + or r14, r30, r30 + or r15, r30, r30 + or r16, r30, r30 + or r30, r30, r30 Removal of the R = R copies is coming next... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Fix a deficiency in the spiller that Evan noticed. In particular, considerChris Lattner
this code: store [stack slot #0], R10 = add R14, [stack slot #0] The spiller didn't know that the store made the value of [stackslot#0] available in R10 *IF* the store came from a copy instruction with the store folded into it. This patch teaches VirtRegMap to look at these stores and recognize the values they make available. In one case Evan provided, this code: divsd %XMM0, %XMM1 movsd %XMM1, QWORD PTR [%ESP + 40] 1) movsd QWORD PTR [%ESP + 48], %XMM1 2) movsd %XMM1, QWORD PTR [%ESP + 48] addsd %XMM1, %XMM0 3) movsd QWORD PTR [%ESP + 48], %XMM1 movsd QWORD PTR [%ESP + 4], %XMM0 turns into: divsd %XMM0, %XMM1 movsd %XMM1, QWORD PTR [%ESP + 40] addsd %XMM1, %XMM0 3) movsd QWORD PTR [%ESP + 48], %XMM1 movsd QWORD PTR [%ESP + 4], %XMM0 In this case, instruction #2 was removed because of the value made available by #1, and inst #1 was later deleted because it is now never used before the stack slot is redefined by #3. This occurs here and there in a lot of code with high spilling, on PPC most of the removed loads/stores are LSU-reject-causing loads, which is nice. On X86, things are much better (because it spills more), where we nuke about 1% of the instructions from SMG2000 and several hundred from eon. More improvements to come... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ↵Chris Lattner
more logical place. Other methods should also be moved if anyoneis interested. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-22Add explicit #includes of <iostream>Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-04Add an assertion, update DefInst even though no one uses it (dangling pointersChris Lattner
don't help anyone) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25081 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06Fix the LLC regressions on X86 last night. In particular, when undoingChris Lattner
previous copy elisions and we discover we need to reload a register, make sure to use the regclass of the original register for the reload, not the class of the current register. This avoid using 16-bit loads to reload 32-bit values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-05Fix a bug in the local spiller, where we could take code like this:Chris Lattner
store r12 -> [ss#2] R3 = load [ss#1] use R3 R3 = load [ss#2] R4 = load [ss#1] and turn it into this code: store R12 -> [ss#2] R3 = load [ss#1] use R3 R3 = R12 R4 = R3 <- oops! The problem was that promoting R3 = load[ss#2] to a copy missed the fact that the instruction invalidated R3 at that point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30Change this code ot pass register classes into the stack slot spiller/reloaderChris Lattner
code. PrologEpilogInserter hasn't been updated yet though, so targets cannot use this info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8
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