| Age | Commit message (Expand) | Author |
| 2012-04-11 | TableGen's regpressure: emit per-registerclass weight limits. | Andrew Trick |
| 2012-04-11 | Comment typo fix. | Duncan Sands |
| 2012-04-10 | Added a TargetRegisterInfo interface for accessing register pressure sets. | Andrew Trick |
| 2012-04-10 | Fix a long standing tail call optimization bug. When a libcall is emitted | Evan Cheng |
| 2012-04-08 | Teach LLVM about a PIE option which, when enabled on top of PIC, makes | Chandler Carruth |
| 2012-04-08 | Move the TLSModel information into the TargetMachine rather than hiding | Chandler Carruth |
| 2012-04-04 | Always compute all the bits in ComputeMaskedBits. | Rafael Espindola |
| 2012-04-02 | Add predicates for checking whether targets have free FNEG and FABS operation... | Owen Anderson |
| 2012-03-25 | Prune some includes and forward declarations. | Craig Topper |
| 2012-03-13 | Target override to allow CodeGenPrepare to sink address operands to intrinsic... | Pete Cooper |
| 2012-03-05 | MCRegisterInfo-ize getMatchingSuperReg. | Jim Grosbach |
| 2012-03-05 | Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce stati... | Craig Topper |
| 2012-03-04 | Use uint16_t to store register overlaps to reduce static data. | Craig Topper |
| 2012-03-04 | Use uint16_t instead of unsigned to store registers in reg classes. Reduces s... | Craig Topper |
| 2012-03-04 | Use uint16_t to store registers in callee saved register tables to reduce siz... | Craig Topper |
| 2012-03-01 | Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it. | Benjamin Kramer |
| 2012-03-01 | Move TargetRegisterInfo::getSubReg() to MCRegisterInfo. | Jim Grosbach |
| 2012-03-01 | Make TargetRegisterClasses non-virtual by making the only virtual function a ... | Benjamin Kramer |
| 2012-02-28 | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng |
| 2012-02-28 | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar |
| 2012-02-28 | Some ARM implementaions, e.g. A-series, does return stack prediction. That is, | Evan Cheng |
| 2012-02-22 | Make all pointers to TargetRegisterClass const since they are all pointers to... | Craig Topper |
| 2012-02-20 | Improve generated code for extending loads and some trunc stores on ARM. | James Molloy |
| 2012-02-15 | Modify the code that emits the module flags to use the new module flags accessor | Bill Wendling |
| 2012-02-14 | Add code to the target lowering object file module to handle module flags. | Bill Wendling |
| 2012-02-14 | Rename getExceptionAddressRegister() to getExceptionPointerRegister() for con... | Lang Hames |
| 2012-02-12 | Remove redundant getAnalysis<> calls in GlobalOpt. Add a few Itanium ABI calls | Nick Lewycky |
| 2012-02-10 | RegAlloc superpass: includes phi elimination, coalescing, and scheduling. | Andrew Trick |
| 2012-02-09 | Store just the SimpleValueType in the generated VT tables for each register c... | Benjamin Kramer |
| 2012-02-05 | Convert assert(0) to llvm_unreachable | Craig Topper |
| 2012-02-04 | TargetPassConfig: confine the MC configuration to TargetMachine. | Andrew Trick |
| 2012-02-03 | Added TargetPassConfig. The first little step toward configuring codegen passes. | Andrew Trick |
| 2012-02-02 | Require non-NULL register masks. | Jakob Stoklund Olesen |
| 2012-02-01 | Specify SubRegIndex components on the index itself. | Jakob Stoklund Olesen |
| 2012-02-01 | VLIW specific scheduler framework that utilizes deterministic finite automato... | Andrew Trick |
| 2012-01-25 | Properly emit ctors / dtors with priorities into desired sections | Anton Korobeynikov |
| 2012-01-24 | Add an (interleave A, B, ...) SetTheory operator. | Jakob Stoklund Olesen |
| 2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
| 2012-01-19 | Add a TargetOption for disabling tail calls. | Nick Lewycky |
| 2012-01-18 | Add a CoveredBySubRegs property to Register descriptions. | Jakob Stoklund Olesen |
| 2012-01-17 | Add TableGen support for callee saved registers. | Jakob Stoklund Olesen |
| 2012-01-17 | Moving options declarations around. | Andrew Trick |
| 2012-01-14 | Add TRI::getCallPreservedMask() hook. | Jakob Stoklund Olesen |
| 2012-01-13 | Added the MachineSchedulerPass skeleton. | Andrew Trick |
| 2012-01-13 | whitespace | Andrew Trick |
| 2012-01-12 | Allow targets to select source order pre-RA scheduler. | Evan Cheng |
| 2012-01-12 | Move Sched::Preference out of TargetMachine.h where it is not referenced. | Evan Cheng |
| 2012-01-10 | Add 'llvm_unreachable' to passify GCC's understanding of the constraints | Chandler Carruth |
| 2012-01-10 | Remove unnecessary default cases in switches that cover all enum values. | David Blaikie |
| 2012-01-09 | Split AsmParser into two components - AsmParser and AsmParserVariant | Devang Patel |