| Age | Commit message (Expand) | Author |
|---|
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2011-06-27 | Remove RCBarriers from TargetInstrDesc. | Evan Cheng |
| 2011-06-27 | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng |
| 2011-03-15 | - Add "Bitcast" target instruction property for instructions which perform | Evan Cheng |
| 2010-11-29 | Merge System into Support. | Michael J. Spencer |
| 2010-11-17 | Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, | Evan Cheng |
| 2010-09-23 | Revert r114703 and r114702, removing the isConditionalMove flag from instruct... | Owen Anderson |
| 2010-09-23 | Add an TargetInstrDesc bit to indicate that a given instruction is a conditio... | Owen Anderson |
| 2010-08-10 | Implement register class inflation. | Jakob Stoklund Olesen |
| 2010-08-08 | Add back in r109901, which adds a Compare flag to the target instructions. It's | Bill Wendling |
| 2010-08-06 | Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn't | Bill Wendling |
| 2010-07-30 | Add a "Compare" flag to the target instruction descriptor. This will be used | Bill Wendling |
| 2010-06-18 | Start TargetRegisterClass indices at 0 instead of 1, so that | Dan Gohman |
| 2010-06-08 | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes |
| 2010-06-05 | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner |
| 2010-06-05 | Initial AVX support for some instructions. No patterns matched | Bruno Cardoso Lopes |
| 2010-03-24 | add a convenient TargetInstrDesc::getNumImplicitUses/Defs method. | Chris Lattner |
| 2009-12-16 | Add @earlyclobber TableGen constraint | Jim Grosbach |
| 2009-10-29 | Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a | Dan Gohman |
| 2009-10-01 | Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When | Evan Cheng |
| 2009-07-29 | 1. Introduce a new TargetOperandInfo::getRegClass() helper method | Chris Lattner |
| 2009-04-12 | Add new TargetInstrDesc::hasImplicitUseOfPhysReg and | Chris Lattner |
| 2009-04-09 | Fix pr3954. The register scavenger asserts for inline assembly with | Bob Wilson |
| 2009-02-05 | Clarify comments. | Evan Cheng |
| 2009-01-05 | Tidy up #includes, deleting a bunch of unnecessary #includes. | Dan Gohman |
| 2008-12-22 | Clarify a comment. | Dan Gohman |
| 2008-12-03 | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman |
| 2008-12-03 | Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86's | Dan Gohman |
| 2008-10-17 | Add RCBarriers to TargetInstrDesc. It's a list of register classes the given ... | Evan Cheng |
| 2008-05-28 | Add a flag to indicate that an instruction is as cheap (or cheaper) than a move | Bill Wendling |
| 2008-04-09 | Fix some minor errors in comments. | Dan Gohman |
| 2008-03-15 | Remove isImplicitDef TargetInstrDesc flag. | Evan Cheng |
| 2008-02-22 | Remove an invalid assertion now that there are implicit virtual register oper... | Evan Cheng |
| 2008-01-10 | Simplify the side effect stuff a bit more and make licm/sinking | Chris Lattner |
| 2008-01-08 | add a mayLoad property for machine instructions, a correlary to mayStore. | Chris Lattner |
| 2008-01-07 | split TargetInstrDesc out into its own header file. | Chris Lattner |
