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authorAndrew Trick <atrick@apple.com>2013-04-23 23:45:14 +0000
committerAndrew Trick <atrick@apple.com>2013-04-23 23:45:14 +0000
commite30f32a69ba57dfecbd670d971048bccaf727798 (patch)
treec8f94e184c49f5c410cfbc218902905c85a42836 /utils/TableGen/CodeGenSchedule.h
parent6982bdd1193551e65effa3737f2a29d55e7901a5 (diff)
Machine model: verify well-formed processor resource groups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180161 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenSchedule.h')
-rw-r--r--utils/TableGen/CodeGenSchedule.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenSchedule.h b/utils/TableGen/CodeGenSchedule.h
index e5b9118fb0..2e0a149104 100644
--- a/utils/TableGen/CodeGenSchedule.h
+++ b/utils/TableGen/CodeGenSchedule.h
@@ -380,6 +380,9 @@ private:
void inferFromItinClass(Record *ItinClassDef, unsigned FromClassIdx);
void inferFromInstRWs(unsigned SCIdx);
+ bool hasSuperGroup(RecVec &SubUnits, CodeGenProcModel &PM);
+ void verifyProcResourceGroups(CodeGenProcModel &PM);
+
void collectProcResources();
void collectItinProcResources(Record *ItinClassDef);