Increase coverage of NaCl-specific LLVM regression tests.

The issues these tests exercise came up in the recent merge of LLVM 3.3;
Since it's considerably more difficult to debug problems in scons tests or
sbtc tests, it makes sense to increase the coverate of LLVM regression tests
as much as possible. These tests help resolve merging issues relatively quickly
and should provide a first-line defense against problem arising in the NaCl
specific LOCALMODs we have within LLVM.

BUG=https://code.google.com/p/nativeclient/issues/detail?id=3578
R=jfb@chromium.org

Review URL: https://codereview.chromium.org/19705002

2 files changed, 71 insertions, 0 deletions

diff --git a/test/NaCl/ARM/GOT-with-disabled-constpools.ll b/test/NaCl/ARM/GOT-with-disabled-constpools.ll
new file mode 100644
index 0000000000..f396c88fc8
--- /dev/null
+++ b/test/NaCl/ARM/GOT-with-disabled-constpools.ll
@@ -0,0 +1,38 @@
+; RUN: pnacl-llc -mtriple=armv7a-none-nacl-gnueabi %s -filetype=obj \
+; RUN:  -relocation-model=pic  -reduce-memory-footprint -sfi-disable-cp \
+; RUN:  -sfi-load -sfi-store -sfi-stack -sfi-branch -sfi-data -mattr=+neon \
+; RUN:  -O0 -disable-fp-elim -mcpu=cortex-a9 -o - \
+; RUN:  | llvm-objdump -disassemble -triple armv7 - | FileCheck %s
+
+; This test exercises -sfi-disable-cp together with -relocation-model=pic,
+; to see that a movw/movt is actually generated as expected.
+
+%struct.object = type { [16 x i8*] }
+
+@__do_eh_ctor.object = internal global %struct.object zeroinitializer, align 8
+@__EH_FRAME_BEGIN__ = internal global [0 x i8] zeroinitializer, section ".eh_frame", align 4
+@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @__do_eh_ctor }]
+
+define void @__register_frame_info(i8* %begin, %struct.object* %ob) {
+entry:
+  %begin.addr = alloca i8*, align 4
+  %ob.addr = alloca %struct.object*, align 4
+  store i8* %begin, i8** %begin.addr, align 4
+  store %struct.object* %ob, %struct.object** %ob.addr, align 4
+  ret void
+}
+
+define internal void @__do_eh_ctor() {
+entry:
+  call void @__register_frame_info(i8* getelementptr inbounds ([0 x i8]* @__EH_FRAME_BEGIN__, i32 0, i32 0), %struct.object* @__do_eh_ctor.object)
+; llvm-objdump doesn't currently show the function label on ARM. Until it
+; learns to do that, do a hacky 'bx lr' check to verify it's in the 2nd
+; function, not the first
+
+; CHECK: bx lr
+; CHECK: movw
+; CHECK-NEXT: movt
+
+  ret void
+}
+
diff --git a/test/NaCl/Localmods/arm-byval-ref-fix.ll b/test/NaCl/Localmods/arm-byval-ref-fix.ll
new file mode 100644
index 0000000000..13759a7f6a
--- /dev/null
+++ b/test/NaCl/Localmods/arm-byval-ref-fix.ll
@@ -0,0 +1,33 @@
+; RUN: pnacl-llc -march=arm -mtriple=armv7a-none-nacl %s -o - | FileCheck %s
+
+; byval is currently crashing on ARM for upstream LLVM (PR11018).
+; We have a LOCALMOD in ARMISelLowering to simply leave byval wholly
+; on the stack, so this is expected to pass.
+
+%struct.S = type { i32, i32 }
+
+define void @foo(%struct.S* byval %w) nounwind {
+entry:
+
+; Verify that 55 is stored onto the stack directly, so the struct is
+; passed by value and not by reference.
+
+; CHECK: foo:
+; CHECK-NEXT: entry
+; CHECK-NEXT: mov [[REG:r[0-9]+]], #55
+; CHECK-NEXT: str [[REG]], [sp]
+
+  %x = getelementptr inbounds %struct.S* %w, i32 0, i32 0
+  store i32 55, i32* %x, align 4
+  ret void
+}
+
+define i32 @main() nounwind {
+entry:
+  %w = alloca %struct.S, align 4
+  store %struct.S { i32 0, i32 0 }, %struct.S* %w
+  call void @foo(%struct.S* byval %w)
+  %x = getelementptr inbounds %struct.S* %w, i32 0, i32 0
+  %retval = load i32* %x, align 4
+  ret i32 %retval
+}