aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/Mips/MipsMCInstLower.cpp
diff options
context:
space:
mode:
authorPetar Jovanovic <petarj@mips.com>2012-10-23 14:24:03 -0700
committerDerek Schuff <dschuff@chromium.org>2012-10-23 14:24:03 -0700
commit56f8ef8fa45d5f444766f52cdeb956982578f1b5 (patch)
treee5d6a231a1db37cbdc86c3c7a8ad9cfcdd0dce38 /lib/Target/Mips/MipsMCInstLower.cpp
parent4ce160aa277821da7b43fb457672a625facbad12 (diff)
[MIPS] Update sandboxing changes for LLVM on MIPS.
This change - resolves conflicts from previous merges; - prevents delay slot filler to use instructions that could be masked; - generates calls to __nacl_read_tp to access thread pointer; - removes previous (now obsolete) sandboxing code of unaligned loads and stores; - propagates relocation model to MipsELFObjectWriter, so that it can set flag ELF::EF_MIPS_PIC (small hack). BUG= http://code.google.com/p/nativeclient/issues/detail?id=2275 TEST= pnacl/build.sh all Review URL: https://codereview.chromium.org/11115013 Patch from Petar Jovanovic <petarj@mips.com>.
Diffstat (limited to 'lib/Target/Mips/MipsMCInstLower.cpp')
-rw-r--r--lib/Target/Mips/MipsMCInstLower.cpp44
1 files changed, 0 insertions, 44 deletions
diff --git a/lib/Target/Mips/MipsMCInstLower.cpp b/lib/Target/Mips/MipsMCInstLower.cpp
index 1d108ab192..d8119ff75c 100644
--- a/lib/Target/Mips/MipsMCInstLower.cpp
+++ b/lib/Target/Mips/MipsMCInstLower.cpp
@@ -161,47 +161,3 @@ void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
}
- MCInst Instr4, Mask1, Mask2; // @LOCALMOD
- // @LOCALMOD-START
- MCOperand MaskReg = MCOperand::CreateReg(Mips::LoadStoreStackMaskReg);
- // @LOCALMOD-END
-
- // @LOCALMOD-START
- if (AsmPrinter.TM.getSubtarget<MipsSubtarget>().isTargetNaCl()) {
- Mask1.setOpcode(Mips::SFI_GUARD_LOADSTORE);
- Mask1.addOperand(Base);
- Mask1.addOperand(Base);
- Mask1.addOperand(MaskReg);
-
- Mask2.setOpcode(Mips::SFI_GUARD_LOADSTORE);
- Mask2.addOperand(Base);
- Mask2.addOperand(Base);
- Mask2.addOperand(MaskReg);
- if (Opc == Mips::ULW || Opc == Mips::USW || Opc == Mips::ULHu) {
- // FIXME: ULHu should be rewritten because it uses mips32r2 instr. INS
- MCInsts.push_back(Mask1);
- MCInsts.push_back(Instr1);
- MCInsts.push_back(Mask2);
- MCInsts.push_back(Instr2);
- if (!TwoInstructions) MCInsts.push_back(Instr3);
- return;
- } else if (Opc == Mips::ULH) {
- MCInsts.push_back(Mask1);
- MCInsts.push_back(Instr1);
- MCInsts.push_back(Mask2);
- MCInsts.push_back(Instr2);
- MCInsts.push_back(Instr3);
- MCInsts.push_back(Instr4);
- return;
- } else if (Opc == Mips::USH) {
- MCInsts.push_back(Mask1);
- MCInsts.push_back(Instr1);
- MCInsts.push_back(Instr2);
- MCInsts.push_back(Mask2);
- MCInsts.push_back(Instr3);
- return;
- } else {
- llvm_unreachable("unaligned instruction not sandboxed");
- }
- }
- // @LOCALMOD-END \ No newline at end of file