diff options
| author | Dan Gohman <gohman@apple.com> | 2008-02-13 22:28:48 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-02-13 22:28:48 +0000 |
| commit | 977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3 (patch) | |
| tree | 8eac120ccc5b79607fa5fffa9a0a4ef365ac149d /lib/Target/CellSPU | |
| parent | ea069065592a43cabe4548299828eb9b26785da7 (diff) | |
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU')
| -rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index 6fe6e48bc8..f6e33599c6 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -2668,7 +2668,7 @@ SPUTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, void SPUTargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op, - APInt Mask, + const APInt &Mask, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 3abb9d17fa..29242df71b 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -108,7 +108,7 @@ namespace llvm { virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; virtual void computeMaskedBitsForTargetNode(const SDOperand Op, - APInt Mask, + const APInt &Mask, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, |