diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-07 06:21:37 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-02-07 06:21:37 +0000 |
commit | 06342c3484dc6ff606db72206f9668276af13a64 (patch) | |
tree | d64b8a86a8100387d14bfc955ba8485d9db0a3fb /lib/Target/Alpha/AlphaISelPattern.cpp | |
parent | 0382401356f420c2a7e2c4a0a7e80c2528566c9d (diff) |
copyfromreg fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20062 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaISelPattern.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 94a9ad521c..6e4704c3ce 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -589,8 +589,11 @@ unsigned ISel::SelectExpr(SDOperand N) { } if (DestType == MVT::f64 || DestType == MVT::f32 || - (opcode == ISD::LOAD && - (N.getValue(0).getValueType() == MVT::f32 || N.getValue(0).getValueType() == MVT::f64))) + ( + (opcode == ISD::LOAD || opcode == ISD::CopyFromReg || opcode == ISD::EXTLOAD) && + (N.getValue(0).getValueType() == MVT::f32 || N.getValue(0).getValueType() == MVT::f64) + ) + ) return SelectExprFP(N, Result); switch (opcode) { @@ -747,7 +750,7 @@ unsigned ISel::SelectExpr(SDOperand N) { { //no need to restore GP as we are doing an indirect call Tmp1 = SelectExpr(N.getOperand(1)); - BuildMI(BB, Alpha::BIS, 2, Alpha::R27).addReg(Tmp1).addReg(Tmp1); + BuildMI(BB, Alpha::BIS, 2, Alpha::R27).addReg(Tmp1).addReg(Tmp1); BuildMI(BB, Alpha::JSR, 2, Alpha::R26).addReg(Alpha::R27).addImm(0); } |