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authorBill Wendling <isanbard@gmail.com>2009-01-30 22:11:22 +0000
committerBill Wendling <isanbard@gmail.com>2009-01-30 22:11:22 +0000
commit41b9d278add97c744930aa2a0048ff1c01e48c4f (patch)
tree6f6ab7502bd7c0480ee44f74bc88a3a8c408c2b2 /lib/CodeGen/SelectionDAG/SelectionDAG.cpp
parent34584e6aedf02a4123ac7605486093e798cdcb71 (diff)
DebugLoc form of getNOT().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63433 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp17
1 files changed, 17 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 16f17e56f4..d573476a35 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -846,6 +846,23 @@ SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) {
return getNode(ISD::XOR, VT, Val, NegOne);
}
+/// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
+///
+SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
+ SDValue NegOne;
+ if (VT.isVector()) {
+ MVT EltVT = VT.getVectorElementType();
+ SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT);
+ std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
+ NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT,
+ &NegOnes[0], NegOnes.size());
+ } else {
+ NegOne = getConstant(VT.getIntegerVTBitMask(), VT);
+ }
+
+ return getNode(ISD::XOR, DL, VT, Val, NegOne);
+}
+
SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
assert((EltVT.getSizeInBits() >= 64 ||