diff options
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 1 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 17 |
2 files changed, 18 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index 895285c748..0972f6b3b7 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -379,6 +379,7 @@ public: /// getNOT - Create a bitwise NOT operation as (XOR Val, -1). SDValue getNOT(SDValue Val, MVT VT); + SDValue getNOT(DebugLoc DL, SDValue Val, MVT VT); /// getCALLSEQ_START - Return a new CALLSEQ_START node, which always must have /// a flag result (to ensure it's not CSE'd). diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 16f17e56f4..d573476a35 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -846,6 +846,23 @@ SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) { return getNode(ISD::XOR, VT, Val, NegOne); } +/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). +/// +SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) { + SDValue NegOne; + if (VT.isVector()) { + MVT EltVT = VT.getVectorElementType(); + SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT); + std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); + NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT, + &NegOnes[0], NegOnes.size()); + } else { + NegOne = getConstant(VT.getIntegerVTBitMask(), VT); + } + + return getNode(ISD::XOR, DL, VT, Val, NegOne); +} + SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; assert((EltVT.getSizeInBits() >= 64 || |