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| author | Evan Cheng <evan.cheng@apple.com> | 2006-04-10 21:09:59 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-04-10 21:09:59 +0000 |
| commit | 6ff7b605ded303f28160ebd92d0af25d2ca3097a (patch) | |
| tree | 45c08cd584d67f9233aa6f76ac5f2aa60aaa51ab /include | |
| parent | 3433141a3e5cae22f79019f52b624d0f384018a7 (diff) | |
__builtin_ia32_loadup{s|d}, __builtin_ia32_storeup{s|d}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27561 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/IntrinsicsX86.td | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index 3776f7db8f..1bd73f4a2d 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -133,7 +133,8 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // SIMD store ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">, - Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>; + Intrinsic<[llvm_void_ty, llvm_ptr_ty, + llvm_v4f32_ty], [IntrWriteMem]>; } // Cacheability support ops @@ -267,6 +268,19 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". llvm_int_ty], [InstrNoMem]>; } +// SIMD load ops +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">, + Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>; +} + +// SIMD store ops +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">, + Intrinsic<[llvm_void_ty, llvm_ptr_ty, + llvm_v2f64_ty], [IntrWriteMem]>; +} + // Misc. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">, |