diff options
| author | Dan Gohman <gohman@apple.com> | 2009-03-13 20:42:20 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-03-13 20:42:20 +0000 |
| commit | 14ea1ec2324cb595f2e035bbf54ddcd483f17c11 (patch) | |
| tree | 32414e0df6b4f5c9c28a4f49ed7e2990bdf511ec /include/llvm/CodeGen | |
| parent | 71503710972ac747e6eaf76877cf1118d2059fce (diff) | |
Fix FastISel's assumption that i1 values are always zero-extended
by inserting explicit zero extensions where necessary. Included
is a testcase where SelectionDAG produces a virtual register
holding an i1 value which FastISel previously mistakenly assumed
to be zero-extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
| -rw-r--r-- | include/llvm/CodeGen/FastISel.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index 1c26b3fd76..085810aaf1 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -269,6 +269,11 @@ protected: unsigned FastEmitInst_extractsubreg(MVT::SimpleValueType RetVT, unsigned Op0, uint32_t Idx); + /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op + /// with all but the least significant bit set to zero. + unsigned FastEmitZExtFromI1(MVT::SimpleValueType VT, + unsigned Op); + /// FastEmitBranch - Emit an unconditional branch to the given block, /// unless it is the immediate (fall-through) successor, and update /// the CFG. |