diff options
| author | Mark Seaborn <mseaborn@chromium.org> | 2013-09-09 15:04:34 -0700 |
|---|---|---|
| committer | Mark Seaborn <mseaborn@chromium.org> | 2013-09-09 15:04:34 -0700 |
| commit | e97dae781c3e7ebd30e05e6ead5a32a86e5b8455 (patch) | |
| tree | 944d482d6ab820f96622344d79916e87865baa7f | |
| parent | b63e4bfe73188f7d68065f5b274e169491e593d2 (diff) | |
PNaCl bitcode: Fix reader to handle pointer type in is.lock.free intrinsic
BUG=https://code.google.com/p/nativeclient/issues/detail?id=3671
TEST=test/NaCl/Bitcode/*.ll
+ NaCl's toolchain_tests with bitcode v2 enabled
Review URL: https://codereview.chromium.org/23523041
| -rw-r--r-- | lib/Bitcode/NaCl/Reader/NaClBitcodeReader.cpp | 3 | ||||
| -rw-r--r-- | test/NaCl/Bitcode/intrinsic-pointer-args.ll | 4 |
2 files changed, 7 insertions, 0 deletions
diff --git a/lib/Bitcode/NaCl/Reader/NaClBitcodeReader.cpp b/lib/Bitcode/NaCl/Reader/NaClBitcodeReader.cpp index f5fd1ba0e7..c826ab3353 100644 --- a/lib/Bitcode/NaCl/Reader/NaClBitcodeReader.cpp +++ b/lib/Bitcode/NaCl/Reader/NaClBitcodeReader.cpp @@ -809,6 +809,9 @@ FunctionType *NaClBitcodeReader::AddPointerTypesToIntrinsicType( } else if (Name.startswith("llvm.nacl.atomic.rmw.")) { assert(ArgTypes.size() >= 3); ArgTypes[1] = ArgTypes[2]->getPointerTo(); + } else if (Name == "llvm.nacl.atomic.is.lock.free") { + assert(ArgTypes.size() >= 2); + ArgTypes[1] = Type::getInt8PtrTy(Context); } return FunctionType::get(ReturnTy, ArgTypes, false); } diff --git a/test/NaCl/Bitcode/intrinsic-pointer-args.ll b/test/NaCl/Bitcode/intrinsic-pointer-args.ll index 0848568fd3..7e5467c9a1 100644 --- a/test/NaCl/Bitcode/intrinsic-pointer-args.ll +++ b/test/NaCl/Bitcode/intrinsic-pointer-args.ll @@ -30,6 +30,8 @@ declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32) declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32) declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) +declare i1 @llvm.nacl.atomic.is.lock.free(i32, i8*) + ; TD: declare i8* @llvm.stacksave() ; TD: declare void @llvm.stackrestore(i8*) @@ -53,3 +55,5 @@ declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) ; TD: declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32) ; TD: declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) + +; TD: declare i1 @llvm.nacl.atomic.is.lock.free(i32, i8*) |